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ASoC: renesas: msiof: tidyup DMAC stop timing
Current DMAC is stopped before HW stop, but it might be cause of sync error. Stop HW first. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com> Link: https://patch.msgid.link/878qi3yuu0.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -238,9 +238,6 @@ static int msiof_hw_stop(struct snd_soc_component *component,
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val = SIIER_RDREQE | SIIER_RDMAE | SISTR_ERR_RX;
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msiof_update(priv, SIIER, val, 0);
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/* Stop DMAC */
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snd_dmaengine_pcm_trigger(substream, cmd);
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/* SICTR */
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if (is_play)
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val = SICTR_TXE;
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@ -248,6 +245,9 @@ static int msiof_hw_stop(struct snd_soc_component *component,
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val = SICTR_RXE;
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msiof_update_and_wait(priv, SICTR, val, 0, 0);
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/* Stop DMAC */
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snd_dmaengine_pcm_trigger(substream, cmd);
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/* indicate error status if exist */
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if (priv->err_syc[substream->stream] ||
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priv->err_ovf[substream->stream] ||
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