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arm64: dts: freescale: imx8mn-var-som: Move UART4 description to Symphony

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The VAR-SOM-MX8MN module does not provide an onboard debug console.
UART4 is routed and exposed only on the Symphony carrier board, while
custom carrier designs may choose to expose a different UART.

Move the UART4 node from the SOM device tree to the
imx8mn-var-som-symphony.dts, keeping the SOM dtsi limited to hardware
present on the module itself.

Signed-off-by: Stefano Radaelli <stefano.r@variscite.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
This commit is contained in:
Stefano Radaelli 2026-07-06 11:34:31 +02:00 committed by Frank Li
parent 4185d10a60
commit 259bd77e9f
2 changed files with 18 additions and 18 deletions
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18
arch/arm64/boot/dts/freescale/imx8mn-var-som-symphony.dts
View File

@ -15,6 +15,10 @@ / {
model = "Variscite VAR-SOM-MX8MN Symphony evaluation board";
compatible = "variscite,var-som-mx8mn-symphony", "variscite,var-som-mx8mn", "fsl,imx8mn";
chosen {
stdout-path = &uart4;
};
reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
compatible = "regulator-fixed";
pinctrl-names = "default";
@ -171,6 +175,13 @@ &uart3 {
status = "okay";
};
/* Console */
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart4>;
status = "okay";
};
&usbotg1 {
dr_mode = "otg";
hnp-disable;
@ -234,4 +245,11 @@ MX8MN_IOMUXC_UART3_RXD_UART3_DCE_RX 0x140
MX8MN_IOMUXC_UART3_TXD_UART3_DCE_TX 0x140
>;
};
pinctrl_uart4: uart4grp {
fsl,pins = <
MX8MN_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140
MX8MN_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140
>;
};
};

18
arch/arm64/boot/dts/freescale/imx8mn-var-som.dtsi
View File

@ -11,10 +11,6 @@ / {
model = "Variscite VAR-SOM-MX8MN module";
compatible = "variscite,var-som-mx8mn", "fsl,imx8mn";
chosen {
stdout-path = &uart4;
};
memory@40000000 {
device_type = "memory";
reg = <0x0 0x40000000 0 0x40000000>;
@ -274,13 +270,6 @@ &uart2 {
status = "okay";
};
/* Console */
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart4>;
status = "okay";
};
&usbotg1 {
dr_mode = "otg";
usb-role-switch;
@ -432,13 +421,6 @@ MX8MN_IOMUXC_SAI3_RXD_UART2_DCE_RTS_B 0x140
>;
};
pinctrl_uart4: uart4grp {
fsl,pins = <
MX8MN_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140
MX8MN_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140
>;
};
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX8MN_IOMUXC_SD1_CLK_USDHC1_CLK 0x190