From 36948ec3d4d0d1b9260d87b550a56fab8d86d17d Mon Sep 17 00:00:00 2001 From: Demetris Ierokipides Date: Fri, 8 Jan 2021 17:10:35 +0200 Subject: [PATCH 01/10] ARM: dts: rockchip: add gpu node to rk3288-miqi Add the Mali GPU node to the MiQi device-tree. Signed-off-by: Demetris Ierokipides Link: https://lore.kernel.org/r/20210108151036.36434-2-ierokipides.dem@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3288-miqi.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts index cf54d5ffff2f..713f55e143c6 100644 --- a/arch/arm/boot/dts/rk3288-miqi.dts +++ b/arch/arm/boot/dts/rk3288-miqi.dts @@ -123,6 +123,11 @@ &gmac { status = "okay"; }; +&gpu { + mali-supply = <&vdd_gpu>; + status = "okay"; +}; + &hdmi { ddc-i2c-bus = <&i2c5>; status = "okay"; From b39d9683c72122c8ac914c3701213b7b9002f2c8 Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Sun, 6 Dec 2020 11:37:08 +0100 Subject: [PATCH 02/10] ARM: dts: rockchip: add QoS register compatibles for rk3066/rk3188 With the conversion of syscon.yaml minItems for compatibles was set to 2. Current Rockchip dtsi files only use "syscon" for QoS registers. Add Rockchip QoS compatibles for rk3066/rk3188 to reduce notifications produced with: make ARCH=arm dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/mfd/syscon.yaml Signed-off-by: Johan Jonker Link: https://lore.kernel.org/r/20201206103711.7465-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3xxx.dtsi | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi index 859a7477909f..49bcdf46d03c 100644 --- a/arch/arm/boot/dts/rk3xxx.dtsi +++ b/arch/arm/boot/dts/rk3xxx.dtsi @@ -151,42 +151,42 @@ uart1: serial@10126000 { }; qos_gpu: qos@1012d000 { - compatible = "syscon"; + compatible = "rockchip,rk3066-qos", "syscon"; reg = <0x1012d000 0x20>; }; qos_vpu: qos@1012e000 { - compatible = "syscon"; + compatible = "rockchip,rk3066-qos", "syscon"; reg = <0x1012e000 0x20>; }; qos_lcdc0: qos@1012f000 { - compatible = "syscon"; + compatible = "rockchip,rk3066-qos", "syscon"; reg = <0x1012f000 0x20>; }; qos_cif0: qos@1012f080 { - compatible = "syscon"; + compatible = "rockchip,rk3066-qos", "syscon"; reg = <0x1012f080 0x20>; }; qos_ipp: qos@1012f100 { - compatible = "syscon"; + compatible = "rockchip,rk3066-qos", "syscon"; reg = <0x1012f100 0x20>; }; qos_lcdc1: qos@1012f180 { - compatible = "syscon"; + compatible = "rockchip,rk3066-qos", "syscon"; reg = <0x1012f180 0x20>; }; qos_cif1: qos@1012f200 { - compatible = "syscon"; + compatible = "rockchip,rk3066-qos", "syscon"; reg = <0x1012f200 0x20>; }; qos_rga: qos@1012f280 { - compatible = "syscon"; + compatible = "rockchip,rk3066-qos", "syscon"; reg = <0x1012f280 0x20>; }; From 6cc35e5edbe43ec6e510e6c53b8c88ae7b1666c2 Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Sun, 6 Dec 2020 11:37:09 +0100 Subject: [PATCH 03/10] ARM: dts: rockchip: add QoS register compatibles for rk3288 With the conversion of syscon.yaml minItems for compatibles was set to 2. Current Rockchip dtsi files only use "syscon" for QoS registers. Add Rockchip QoS compatibles for rk3288 to reduce notifications produced with: make ARCH=arm dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/mfd/syscon.yaml Signed-off-by: Johan Jonker Link: https://lore.kernel.org/r/20201206103711.7465-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3288.dtsi | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 68d5a58cfe88..01ea1f170f77 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -1329,72 +1329,72 @@ opp-600000000 { }; qos_gpu_r: qos@ffaa0000 { - compatible = "syscon"; + compatible = "rockchip,rk3288-qos", "syscon"; reg = <0x0 0xffaa0000 0x0 0x20>; }; qos_gpu_w: qos@ffaa0080 { - compatible = "syscon"; + compatible = "rockchip,rk3288-qos", "syscon"; reg = <0x0 0xffaa0080 0x0 0x20>; }; qos_vio1_vop: qos@ffad0000 { - compatible = "syscon"; + compatible = "rockchip,rk3288-qos", "syscon"; reg = <0x0 0xffad0000 0x0 0x20>; }; qos_vio1_isp_w0: qos@ffad0100 { - compatible = "syscon"; + compatible = "rockchip,rk3288-qos", "syscon"; reg = <0x0 0xffad0100 0x0 0x20>; }; qos_vio1_isp_w1: qos@ffad0180 { - compatible = "syscon"; + compatible = "rockchip,rk3288-qos", "syscon"; reg = <0x0 0xffad0180 0x0 0x20>; }; qos_vio0_vop: qos@ffad0400 { - compatible = "syscon"; + compatible = "rockchip,rk3288-qos", "syscon"; reg = <0x0 0xffad0400 0x0 0x20>; }; qos_vio0_vip: qos@ffad0480 { - compatible = "syscon"; + compatible = "rockchip,rk3288-qos", "syscon"; reg = <0x0 0xffad0480 0x0 0x20>; }; qos_vio0_iep: qos@ffad0500 { - compatible = "syscon"; + compatible = "rockchip,rk3288-qos", "syscon"; reg = <0x0 0xffad0500 0x0 0x20>; }; qos_vio2_rga_r: qos@ffad0800 { - compatible = "syscon"; + compatible = "rockchip,rk3288-qos", "syscon"; reg = <0x0 0xffad0800 0x0 0x20>; }; qos_vio2_rga_w: qos@ffad0880 { - compatible = "syscon"; + compatible = "rockchip,rk3288-qos", "syscon"; reg = <0x0 0xffad0880 0x0 0x20>; }; qos_vio1_isp_r: qos@ffad0900 { - compatible = "syscon"; + compatible = "rockchip,rk3288-qos", "syscon"; reg = <0x0 0xffad0900 0x0 0x20>; }; qos_video: qos@ffae0000 { - compatible = "syscon"; + compatible = "rockchip,rk3288-qos", "syscon"; reg = <0x0 0xffae0000 0x0 0x20>; }; qos_hevc_r: qos@ffaf0000 { - compatible = "syscon"; + compatible = "rockchip,rk3288-qos", "syscon"; reg = <0x0 0xffaf0000 0x0 0x20>; }; qos_hevc_w: qos@ffaf0080 { - compatible = "syscon"; + compatible = "rockchip,rk3288-qos", "syscon"; reg = <0x0 0xffaf0080 0x0 0x20>; }; From b840662bd55fb6dc9204585f071518123a87b59d Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Sun, 17 Jan 2021 16:09:51 +0100 Subject: [PATCH 04/10] ARM: dts: rockchip: rename thermal subnodes for rk3288 A test with the command below gives for example this error: /arch/arm/boot/dts/rk3288-tinker.dt.yaml: thermal-zones: 'cpu_thermal', 'gpu_thermal', 'reserve_thermal' do not match any of the regexes: '^[a-zA-Z][a-zA-Z0-9\\-]{1,12}-thermal$', 'pinctrl-[0-9]+' Rename Rockchip rk3288 thermal subnodes so that it ends with "-thermal" make ARCH=arm dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/ thermal/thermal-zones.yaml Signed-off-by: Johan Jonker Link: https://lore.kernel.org/r/20210117150953.16475-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3288.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 01ea1f170f77..29ffe2eb9bf9 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -488,14 +488,14 @@ uart4: serial@ff1c0000 { }; thermal-zones { - reserve_thermal: reserve_thermal { + reserve_thermal: reserve-thermal { polling-delay-passive = <1000>; /* milliseconds */ polling-delay = <5000>; /* milliseconds */ thermal-sensors = <&tsadc 0>; }; - cpu_thermal: cpu_thermal { + cpu_thermal: cpu-thermal { polling-delay-passive = <100>; /* milliseconds */ polling-delay = <5000>; /* milliseconds */ @@ -539,7 +539,7 @@ map1 { }; }; - gpu_thermal: gpu_thermal { + gpu_thermal: gpu-thermal { polling-delay-passive = <100>; /* milliseconds */ polling-delay = <5000>; /* milliseconds */ From 2525f194f9dc07c48b0a12697128357068c2e04b Mon Sep 17 00:00:00 2001 From: Yifeng Zhao Date: Thu, 10 Dec 2020 08:22:17 +0800 Subject: [PATCH 05/10] ARM: dts: rockchip: Add NFC node for RV1108 SoC Add NAND FLASH Controller(NFC) node for RV1108 SoC. Signed-off-by: Yifeng Zhao Link: https://lore.kernel.org/r/20201210002219.5739-2-yifeng.zhao@rock-chips.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rv1108.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi index e491964b1c3d..15fa25585ea4 100644 --- a/arch/arm/boot/dts/rv1108.dtsi +++ b/arch/arm/boot/dts/rv1108.dtsi @@ -452,6 +452,17 @@ cru: clock-controller@20200000 { #reset-cells = <1>; }; + nfc: nand-controller@30100000 { + compatible = "rockchip,rv1108-nfc"; + reg = <0x30100000 0x1000>; + interrupts = ; + clocks = <&cru HCLK_NANDC>, <&cru SCLK_NANDC>; + clock-names = "ahb", "nfc"; + assigned-clocks = <&cru SCLK_NANDC>; + assigned-clock-rates = <150000000>; + status = "disabled"; + }; + emmc: mmc@30110000 { compatible = "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x30110000 0x4000>; From 9c2bfe53b2fc4a8a63311f162e80b27978db6c06 Mon Sep 17 00:00:00 2001 From: Yifeng Zhao Date: Thu, 10 Dec 2020 08:22:18 +0800 Subject: [PATCH 06/10] ARM: dts: rockchip: Add NFC node for RK2928 and other SoCs Add NAND FLASH Controller(NFC) node for RK2928, RK3066, RK3168 and RK3188 SoCs. Signed-off-by: Yifeng Zhao Link: https://lore.kernel.org/r/20201210002219.5739-3-yifeng.zhao@rock-chips.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3xxx.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi index 49bcdf46d03c..d3eb25844e97 100644 --- a/arch/arm/boot/dts/rk3xxx.dtsi +++ b/arch/arm/boot/dts/rk3xxx.dtsi @@ -276,6 +276,15 @@ emmc: mmc@1021c000 { status = "disabled"; }; + nfc: nand-controller@10500000 { + compatible = "rockchip,rk2928-nfc"; + reg = <0x10500000 0x4000>; + interrupts = ; + clocks = <&cru HCLK_NANDC0>; + clock-names = "ahb"; + status = "disabled"; + }; + pmu: pmu@20004000 { compatible = "rockchip,rk3066-pmu", "syscon", "simple-mfd"; reg = <0x20004000 0x100>; From 4cd9a03435bcd20ce6f524e3826fd263951c22fe Mon Sep 17 00:00:00 2001 From: Yifeng Zhao Date: Thu, 10 Dec 2020 08:22:19 +0800 Subject: [PATCH 07/10] ARM: dts: rockchip: Add NFC node for RK3036 SoC Add NAND FLASH Controller(NFC) node for RK3036 SoC. Signed-off-by: Yifeng Zhao Link: https://lore.kernel.org/r/20201210002219.5739-4-yifeng.zhao@rock-chips.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3036.dtsi | 52 +++++++++++++++++++++++++++++++++++ 1 file changed, 52 insertions(+) diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi index 093567022386..dda5a1f79aca 100644 --- a/arch/arm/boot/dts/rk3036.dtsi +++ b/arch/arm/boot/dts/rk3036.dtsi @@ -292,6 +292,21 @@ i2s: i2s@10220000 { status = "disabled"; }; + nfc: nand-controller@10500000 { + compatible = "rockchip,rk3036-nfc", + "rockchip,rk2928-nfc"; + reg = <0x10500000 0x4000>; + interrupts = ; + clocks = <&cru HCLK_NANDC>, <&cru SCLK_NANDC>; + clock-names = "ahb", "nfc"; + assigned-clocks = <&cru SCLK_NANDC>; + assigned-clock-rates = <150000000>; + pinctrl-0 = <&flash_ale &flash_bus8 &flash_cle &flash_csn0 + &flash_rdn &flash_rdy &flash_wrn>; + pinctrl-names = "default"; + status = "disabled"; + }; + cru: clock-controller@20000000 { compatible = "rockchip,rk3036-cru"; reg = <0x20000000 0x1000>; @@ -643,6 +658,43 @@ emmc_bus8: emmc-bus8 { }; }; + nfc { + flash_ale: flash-ale { + rockchip,pins = <2 RK_PA0 1 &pcfg_pull_default>; + }; + + flash_bus8: flash-bus8 { + rockchip,pins = <1 RK_PD0 1 &pcfg_pull_default>, + <1 RK_PD1 1 &pcfg_pull_default>, + <1 RK_PD2 1 &pcfg_pull_default>, + <1 RK_PD3 1 &pcfg_pull_default>, + <1 RK_PD4 1 &pcfg_pull_default>, + <1 RK_PD5 1 &pcfg_pull_default>, + <1 RK_PD6 1 &pcfg_pull_default>, + <1 RK_PD7 1 &pcfg_pull_default>; + }; + + flash_cle: flash-cle { + rockchip,pins = <2 RK_PA1 1 &pcfg_pull_default>; + }; + + flash_csn0: flash-csn0 { + rockchip,pins = <2 RK_PA6 1 &pcfg_pull_default>; + }; + + flash_rdn: flash-rdn { + rockchip,pins = <2 RK_PA3 1 &pcfg_pull_default>; + }; + + flash_rdy: flash-rdy { + rockchip,pins = <2 RK_PA4 1 &pcfg_pull_default>; + }; + + flash_wrn: flash-wrn { + rockchip,pins = <2 RK_PA2 1 &pcfg_pull_default>; + }; + }; + emac { emac_xfer: emac-xfer { rockchip,pins = <2 RK_PB2 1 &pcfg_pull_default>, /* crs_dvalid */ From 5eae5696eed5cc460867521c3c67db9ab62e1a0d Mon Sep 17 00:00:00 2001 From: Robin Murphy Date: Wed, 20 Jan 2021 23:42:22 +0000 Subject: [PATCH 08/10] ARM: dts: rockchip: Remove bogus "amba" bus nodes The "amba" bus nodes wrapping all the DMA-330 nodes serve no useful purpose, and certainly bear no relation at all to the actual underlying interconnect topology. They appear to be cargo-cult copying from a design misstep in the very early days of FDT adoption on ARM, which was righted with the "arm,primecell" compatible, and the last trace of the idea finally purged by commit 2ef7d5f342c1 ("ARM, ARM64: dts: drop "arm,amba-bus" in favor of "simple-bus""). As such, they can simply be removed and the DMA-330 nodes fitted into the normal sort order. Signed-off-by: Robin Murphy Link: https://lore.kernel.org/r/e682edd25133bde2ed8198138febc90071530a51.1611186142.git.robin.murphy@arm.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3036.dtsi | 31 ++++++-------- arch/arm/boot/dts/rk322x.dtsi | 29 +++++-------- arch/arm/boot/dts/rk3288.dtsi | 81 ++++++++++++++++------------------- arch/arm/boot/dts/rk3xxx.dtsi | 81 ++++++++++++++++------------------- 4 files changed, 97 insertions(+), 125 deletions(-) diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi index dda5a1f79aca..47a787a12e55 100644 --- a/arch/arm/boot/dts/rk3036.dtsi +++ b/arch/arm/boot/dts/rk3036.dtsi @@ -54,25 +54,6 @@ cpu1: cpu@f01 { }; }; - amba: bus { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - pdma: pdma@20078000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x20078000 0x4000>; - interrupts = , - ; - #dma-cells = <1>; - arm,pl330-broken-no-flushp; - arm,pl330-periph-burst; - clocks = <&cru ACLK_DMAC2>; - clock-names = "apb_pclk"; - }; - }; - arm-pmu { compatible = "arm,cortex-a7-pmu"; interrupts = , @@ -509,6 +490,18 @@ spi: spi@20074000 { status = "disabled"; }; + pdma: pdma@20078000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x20078000 0x4000>; + interrupts = , + ; + #dma-cells = <1>; + arm,pl330-broken-no-flushp; + arm,pl330-periph-burst; + clocks = <&cru ACLK_DMAC2>; + clock-names = "apb_pclk"; + }; + pinctrl: pinctrl { compatible = "rockchip,rk3036-pinctrl"; rockchip,grf = <&grf>; diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi index 48e6e8d44a1a..4d003afd0e3e 100644 --- a/arch/arm/boot/dts/rk322x.dtsi +++ b/arch/arm/boot/dts/rk322x.dtsi @@ -95,24 +95,6 @@ opp-1200000000 { }; }; - amba: bus { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - pdma: pdma@110f0000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x110f0000 0x4000>; - interrupts = , - ; - #dma-cells = <1>; - arm,pl330-periph-burst; - clocks = <&cru ACLK_DMAC>; - clock-names = "apb_pclk"; - }; - }; - arm-pmu { compatible = "arm,cortex-a7-pmu"; interrupts = , @@ -464,6 +446,17 @@ cru: clock-controller@110e0000 { <75000000>; }; + pdma: pdma@110f0000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x110f0000 0x4000>; + interrupts = , + ; + #dma-cells = <1>; + arm,pl330-periph-burst; + clocks = <&cru ACLK_DMAC>; + clock-names = "apb_pclk"; + }; + thermal-zones { cpu_thermal: cpu-thermal { polling-delay-passive = <100>; /* milliseconds */ diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 29ffe2eb9bf9..ea7416c31f9b 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -154,50 +154,6 @@ opp-1608000000 { }; }; - amba: bus { - compatible = "simple-bus"; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - dmac_peri: dma-controller@ff250000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x0 0xff250000 0x0 0x4000>; - interrupts = , - ; - #dma-cells = <1>; - arm,pl330-broken-no-flushp; - arm,pl330-periph-burst; - clocks = <&cru ACLK_DMAC2>; - clock-names = "apb_pclk"; - }; - - dmac_bus_ns: dma-controller@ff600000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x0 0xff600000 0x0 0x4000>; - interrupts = , - ; - #dma-cells = <1>; - arm,pl330-broken-no-flushp; - arm,pl330-periph-burst; - clocks = <&cru ACLK_DMAC1>; - clock-names = "apb_pclk"; - status = "disabled"; - }; - - dmac_bus_s: dma-controller@ffb20000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x0 0xffb20000 0x0 0x4000>; - interrupts = , - ; - #dma-cells = <1>; - arm,pl330-broken-no-flushp; - arm,pl330-periph-burst; - clocks = <&cru ACLK_DMAC1>; - clock-names = "apb_pclk"; - }; - }; - reserved-memory { #address-cells = <2>; #size-cells = <2>; @@ -487,6 +443,18 @@ uart4: serial@ff1c0000 { status = "disabled"; }; + dmac_peri: dma-controller@ff250000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x0 0xff250000 0x0 0x4000>; + interrupts = , + ; + #dma-cells = <1>; + arm,pl330-broken-no-flushp; + arm,pl330-periph-burst; + clocks = <&cru ACLK_DMAC2>; + clock-names = "apb_pclk"; + }; + thermal-zones { reserve_thermal: reserve-thermal { polling-delay-passive = <1000>; /* milliseconds */ @@ -665,6 +633,19 @@ usb_hsic: usb@ff5c0000 { status = "disabled"; }; + dmac_bus_ns: dma-controller@ff600000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x0 0xff600000 0x0 0x4000>; + interrupts = , + ; + #dma-cells = <1>; + arm,pl330-broken-no-flushp; + arm,pl330-periph-burst; + clocks = <&cru ACLK_DMAC1>; + clock-names = "apb_pclk"; + status = "disabled"; + }; + i2c0: i2c@ff650000 { compatible = "rockchip,rk3288-i2c"; reg = <0x0 0xff650000 0x0 0x1000>; @@ -1398,6 +1379,18 @@ qos_hevc_w: qos@ffaf0080 { reg = <0x0 0xffaf0080 0x0 0x20>; }; + dmac_bus_s: dma-controller@ffb20000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x0 0xffb20000 0x0 0x4000>; + interrupts = , + ; + #dma-cells = <1>; + arm,pl330-broken-no-flushp; + arm,pl330-periph-burst; + clocks = <&cru ACLK_DMAC1>; + clock-names = "apb_pclk"; + }; + efuse: efuse@ffb40000 { compatible = "rockchip,rk3288-efuse"; reg = <0x0 0xffb40000 0x0 0x20>; diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi index d3eb25844e97..755c946f11de 100644 --- a/arch/arm/boot/dts/rk3xxx.dtsi +++ b/arch/arm/boot/dts/rk3xxx.dtsi @@ -32,50 +32,6 @@ aliases { spi1 = &spi1; }; - amba: bus { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - dmac1_s: dma-controller@20018000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x20018000 0x4000>; - interrupts = , - ; - #dma-cells = <1>; - arm,pl330-broken-no-flushp; - arm,pl330-periph-burst; - clocks = <&cru ACLK_DMA1>; - clock-names = "apb_pclk"; - }; - - dmac1_ns: dma-controller@2001c000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x2001c000 0x4000>; - interrupts = , - ; - #dma-cells = <1>; - arm,pl330-broken-no-flushp; - arm,pl330-periph-burst; - clocks = <&cru ACLK_DMA1>; - clock-names = "apb_pclk"; - status = "disabled"; - }; - - dmac2: dma-controller@20078000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x20078000 0x4000>; - interrupts = , - ; - #dma-cells = <1>; - arm,pl330-broken-no-flushp; - arm,pl330-periph-burst; - clocks = <&cru ACLK_DMA2>; - clock-names = "apb_pclk"; - }; - }; - xin24m: oscillator { compatible = "fixed-clock"; clock-frequency = <24000000>; @@ -304,6 +260,31 @@ grf: grf@20008000 { reg = <0x20008000 0x200>; }; + dmac1_s: dma-controller@20018000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x20018000 0x4000>; + interrupts = , + ; + #dma-cells = <1>; + arm,pl330-broken-no-flushp; + arm,pl330-periph-burst; + clocks = <&cru ACLK_DMA1>; + clock-names = "apb_pclk"; + }; + + dmac1_ns: dma-controller@2001c000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x2001c000 0x4000>; + interrupts = , + ; + #dma-cells = <1>; + arm,pl330-broken-no-flushp; + arm,pl330-periph-burst; + clocks = <&cru ACLK_DMA1>; + clock-names = "apb_pclk"; + status = "disabled"; + }; + i2c0: i2c@2002d000 { compatible = "rockchip,rk3066-i2c"; reg = <0x2002d000 0x1000>; @@ -478,4 +459,16 @@ spi1: spi@20074000 { dma-names = "tx", "rx"; status = "disabled"; }; + + dmac2: dma-controller@20078000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x20078000 0x4000>; + interrupts = , + ; + #dma-cells = <1>; + arm,pl330-broken-no-flushp; + arm,pl330-periph-burst; + clocks = <&cru ACLK_DMA2>; + clock-names = "apb_pclk"; + }; }; From 94e8a5f6d0dee8e81bdcef6d3e86a027459df225 Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Mon, 18 Jan 2021 16:52:38 +0100 Subject: [PATCH 09/10] ARM: dts: rockchip: assign a fixed index to mmc devices on rk322x boards Recently introduced async probe on mmc devices can shuffle block IDs. Pin them to fixed values to ease booting in environments where UUIDs are not practical. Use newly introduced aliases for mmcblk devices from [1]. The sort order is based on reg address. [1] https://patchwork.kernel.org/patch/11747669/ Signed-off-by: Johan Jonker Link: https://lore.kernel.org/r/20210118155242.7172-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk322x.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi index 4d003afd0e3e..a4dd50aaf3fc 100644 --- a/arch/arm/boot/dts/rk322x.dtsi +++ b/arch/arm/boot/dts/rk322x.dtsi @@ -14,6 +14,9 @@ / { interrupt-parent = <&gic>; aliases { + mmc0 = &sdmmc; + mmc1 = &sdio; + mmc2 = &emmc; serial0 = &uart0; serial1 = &uart1; serial2 = &uart2; From 1034e2b6b8435758c0d699b77761365fd09a5f4a Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Mon, 18 Jan 2021 16:52:39 +0100 Subject: [PATCH 10/10] ARM: dts: rockchip: assign a fixed index to mmc devices on rv1108 boards Recently introduced async probe on mmc devices can shuffle block IDs. Pin them to fixed values to ease booting in environments where UUIDs are not practical. Use newly introduced aliases for mmcblk devices from [1]. The sort order is based on reg address. [1] https://patchwork.kernel.org/patch/11747669/ Signed-off-by: Johan Jonker Link: https://lore.kernel.org/r/20210118155242.7172-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rv1108.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi index 15fa25585ea4..7319a2473b80 100644 --- a/arch/arm/boot/dts/rv1108.dtsi +++ b/arch/arm/boot/dts/rv1108.dtsi @@ -19,6 +19,9 @@ aliases { i2c1 = &i2c1; i2c2 = &i2c2; i2c3 = &i2c3; + mmc0 = &emmc; + mmc1 = &sdio; + mmc2 = &sdmmc; serial0 = &uart0; serial1 = &uart1; serial2 = &uart2;