diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi index ca55dd095e80..72dc974fe6fc 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -85,6 +85,47 @@ ppvar_sys: regulator-var-sys { }; }; +&i2c0 { + status = "okay"; + + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; +}; + +&i2c1 { + status = "okay"; + + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; +}; + +&i2c2 { + status = "okay"; + + clock-frequency = <400000>; + clock-stretch-ns = <12600>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins>; +}; + +&i2c3 { + status = "okay"; + + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c3_pins>; +}; + +&i2c7 { + status = "okay"; + + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c7_pins>; +}; + &pio { /* 220 lines */ gpio-line-names = "I2S_DP_LRCK", @@ -311,6 +352,91 @@ &pio { "AUD_DAT_MOSI1", "AUD_DAT_MISO0", "AUD_DAT_MISO1"; + + i2c0_pins: i2c0-default-pins { + pins-bus { + pinmux = , + ; + bias-pull-up = ; + drive-strength-microamp = <1000>; + }; + }; + + i2c1_pins: i2c1-default-pins { + pins-bus { + pinmux = , + ; + bias-pull-up = ; + drive-strength-microamp = <1000>; + }; + }; + + i2c2_pins: i2c2-default-pins { + pins-bus { + pinmux = , + ; + bias-pull-up = ; + }; + }; + + i2c3_pins: i2c3-default-pins { + pins-bus { + pinmux = , + ; + bias-disable; + drive-strength-microamp = <1000>; + }; + }; + + i2c7_pins: i2c7-default-pins { + pins-bus { + pinmux = , + ; + bias-disable; + drive-strength-microamp = <1000>; + }; + }; + + spi1_pins: spi1-default-pins { + pins-cs-mosi-clk { + pinmux = , + , + ; + bias-disable; + }; + + pins-miso { + pinmux = ; + bias-pull-down; + }; + }; + + spi5_pins: spi5-default-pins { + pins-bus { + pinmux = , + , + , + ; + bias-disable; + }; + }; +}; + +&spi1 { + status = "okay"; + + mediatek,pad-select = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&spi1_pins>; +}; + +&spi5 { + status = "okay"; + + cs-gpios = <&pio 37 GPIO_ACTIVE_LOW>; + mediatek,pad-select = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&spi5_pins>; }; &uart0 {