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net: ethernet: adi: adin1110: Reduce the MDIO_TRDONE poll interval
In order to do a clause 22 access to the PHY registers of the ADIN1110, we have to write the MDIO frame to the ADIN1110_MDIOACC register, and then poll the MDIO_TRDONE bit (for a 1) in the same register. The device will set this bit to 1 once the internal MDIO transaction is done. In practice, this bit takes ~50 - 60 us to be set. The first attempt to poll the bit is right after the ADIN1110_MDIOACC register is written, so it will always be read as 0. The next check will only be done after 10 ms, which will result in the MDIO transactions taking a long time to complete. Reduce this polling interval to 100 us. Since this interval is short enough, switch the poll function to readx_poll_timeout_atomic() instead. Reviewed-by: Nuno Sa <nuno.sa@analog.com> Signed-off-by: Ciprian Regus <ciprian.regus@analog.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20240223162129.154114-1-ciprian.regus@analog.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
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@ -464,8 +464,9 @@ static int adin1110_mdio_read(struct mii_bus *bus, int phy_id, int reg)
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* bitfield of ADIN1110_MDIOACC register will contain
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* the requested register value.
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*/
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ret = readx_poll_timeout(adin1110_read_mdio_acc, priv, val,
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(val & ADIN1110_MDIO_TRDONE), 10000, 30000);
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ret = readx_poll_timeout_atomic(adin1110_read_mdio_acc, priv, val,
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(val & ADIN1110_MDIO_TRDONE),
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100, 30000);
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if (ret < 0)
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return ret;
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@ -495,8 +496,9 @@ static int adin1110_mdio_write(struct mii_bus *bus, int phy_id,
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if (ret < 0)
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return ret;
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return readx_poll_timeout(adin1110_read_mdio_acc, priv, val,
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(val & ADIN1110_MDIO_TRDONE), 10000, 30000);
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return readx_poll_timeout_atomic(adin1110_read_mdio_acc, priv, val,
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(val & ADIN1110_MDIO_TRDONE),
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100, 30000);
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}
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/* ADIN1110 MAC-PHY contains an ADIN1100 PHY.
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