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phy: qcom: edp: Introduce support for DisplayPort
The eDP phy can be used to drive either eDP or DP output, with some minor variations in some of the configuration and seemingly a need for implementing swing and pre_emphasis calibration. Introduce a config object, indicating if the phy is operating in eDP or DP mode and swing/pre-emphasis calibration to support this. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220810040745.3582985-5-bjorn.andersson@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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@ -70,8 +70,19 @@
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#define TXn_TRAN_DRVR_EMP_EN 0x0078
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struct qcom_edp_cfg {
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bool is_dp;
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/* DP PHY swing and pre_emphasis tables */
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const u8 (*swing_hbr_rbr)[4][4];
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const u8 (*swing_hbr3_hbr2)[4][4];
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const u8 (*pre_emphasis_hbr_rbr)[4][4];
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const u8 (*pre_emphasis_hbr3_hbr2)[4][4];
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};
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struct qcom_edp {
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struct device *dev;
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const struct qcom_edp_cfg *cfg;
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struct phy *phy;
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@ -92,7 +103,9 @@ struct qcom_edp {
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static int qcom_edp_phy_init(struct phy *phy)
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{
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struct qcom_edp *edp = phy_get_drvdata(phy);
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const struct qcom_edp_cfg *cfg = edp->cfg;
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int ret;
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u8 cfg8;
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ret = regulator_bulk_enable(ARRAY_SIZE(edp->supplies), edp->supplies);
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if (ret)
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@ -117,6 +130,13 @@ static int qcom_edp_phy_init(struct phy *phy)
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DP_PHY_PD_CTL_PLL_PWRDN | DP_PHY_PD_CTL_DP_CLAMP_EN,
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edp->edp + DP_PHY_PD_CTL);
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if (cfg && cfg->is_dp)
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cfg8 = 0xb7;
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else
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cfg8 = 0x37;
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writel(0xfc, edp->edp + DP_PHY_MODE);
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writel(0x00, edp->edp + DP_PHY_AUX_CFG0);
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writel(0x13, edp->edp + DP_PHY_AUX_CFG1);
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writel(0x24, edp->edp + DP_PHY_AUX_CFG2);
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@ -125,7 +145,7 @@ static int qcom_edp_phy_init(struct phy *phy)
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writel(0x26, edp->edp + DP_PHY_AUX_CFG5);
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writel(0x0a, edp->edp + DP_PHY_AUX_CFG6);
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writel(0x03, edp->edp + DP_PHY_AUX_CFG7);
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writel(0x37, edp->edp + DP_PHY_AUX_CFG8);
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writel(cfg8, edp->edp + DP_PHY_AUX_CFG8);
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writel(0x03, edp->edp + DP_PHY_AUX_CFG9);
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writel(PHY_AUX_STOP_ERR_MASK | PHY_AUX_DEC_ERR_MASK |
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@ -142,14 +162,60 @@ static int qcom_edp_phy_init(struct phy *phy)
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return ret;
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}
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static int qcom_edp_set_voltages(struct qcom_edp *edp, const struct phy_configure_opts_dp *dp_opts)
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{
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const struct qcom_edp_cfg *cfg = edp->cfg;
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unsigned int v_level = 0;
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unsigned int p_level = 0;
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u8 ldo_config;
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u8 swing;
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u8 emph;
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int i;
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if (!cfg)
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return 0;
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for (i = 0; i < dp_opts->lanes; i++) {
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v_level = max(v_level, dp_opts->voltage[i]);
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p_level = max(p_level, dp_opts->pre[i]);
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}
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if (dp_opts->link_rate <= 2700) {
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swing = (*cfg->swing_hbr_rbr)[v_level][p_level];
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emph = (*cfg->pre_emphasis_hbr_rbr)[v_level][p_level];
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} else {
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swing = (*cfg->swing_hbr3_hbr2)[v_level][p_level];
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emph = (*cfg->pre_emphasis_hbr3_hbr2)[v_level][p_level];
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}
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if (swing == 0xff || emph == 0xff)
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return -EINVAL;
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ldo_config = (cfg && cfg->is_dp) ? 0x1 : 0x0;
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writel(ldo_config, edp->tx0 + TXn_LDO_CONFIG);
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writel(swing, edp->tx0 + TXn_TX_DRV_LVL);
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writel(emph, edp->tx0 + TXn_TX_EMP_POST1_LVL);
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writel(ldo_config, edp->tx1 + TXn_LDO_CONFIG);
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writel(swing, edp->tx1 + TXn_TX_DRV_LVL);
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writel(emph, edp->tx1 + TXn_TX_EMP_POST1_LVL);
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return 0;
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}
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static int qcom_edp_phy_configure(struct phy *phy, union phy_configure_opts *opts)
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{
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const struct phy_configure_opts_dp *dp_opts = &opts->dp;
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struct qcom_edp *edp = phy_get_drvdata(phy);
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int ret = 0;
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memcpy(&edp->dp_opts, dp_opts, sizeof(*dp_opts));
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return 0;
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if (dp_opts->set_voltages)
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ret = qcom_edp_set_voltages(edp, dp_opts);
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return ret;
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}
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static int qcom_edp_configure_ssc(const struct qcom_edp *edp)
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@ -315,7 +381,9 @@ static int qcom_edp_set_vco_div(const struct qcom_edp *edp)
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static int qcom_edp_phy_power_on(struct phy *phy)
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{
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const struct qcom_edp *edp = phy_get_drvdata(phy);
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const struct qcom_edp_cfg *cfg = edp->cfg;
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u32 bias0_en, drvr0_en, bias1_en, drvr1_en;
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u8 ldo_config;
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int timeout;
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int ret;
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u32 val;
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@ -332,8 +400,11 @@ static int qcom_edp_phy_power_on(struct phy *phy)
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if (timeout)
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return timeout;
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writel(0x01, edp->tx0 + TXn_LDO_CONFIG);
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writel(0x01, edp->tx1 + TXn_LDO_CONFIG);
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ldo_config = (cfg && cfg->is_dp) ? 0x1 : 0x0;
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writel(ldo_config, edp->tx0 + TXn_LDO_CONFIG);
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writel(ldo_config, edp->tx1 + TXn_LDO_CONFIG);
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writel(0x00, edp->tx0 + TXn_LANE_MODE_1);
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writel(0x00, edp->tx1 + TXn_LANE_MODE_1);
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@ -635,6 +706,7 @@ static int qcom_edp_phy_probe(struct platform_device *pdev)
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return -ENOMEM;
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edp->dev = dev;
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edp->cfg = of_device_get_match_data(&pdev->dev);
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edp->edp = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(edp->edp))
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