arm64: dts: rockchip: use generic Ethernet PHY reset bindings for Lunzn Fastrhino R68S

Replace the deprecated snps,reset-xxx bindings to the generic Ethernet
PHY reset GPIO bindings. According to the PHY datasheet, the RTL8211F
PHY needs a 10ms assert delay and at least 72ms deassert delay.
Considering the possibility of mixed use of PHY chips, increased the
reset time.

Fixes: b9f8ca655d ("arm64: dts: rockchip: Add Lunzn Fastrhino R68S")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://lore.kernel.org/r/20240710143017.685905-2-amadeus@jmu.edu.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Chukun Pan 2024-07-10 22:30:15 +08:00 committed by Heiko Stuebner
parent def33fb119
commit 22de886d49

View File

@ -39,10 +39,6 @@ &gmac0_tx_bus2
&gmac0_rx_bus2
&gmac0_rgmii_clk
&gmac0_rgmii_bus>;
snps,reset-gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
/* Reset time is 15ms, 50ms for rtl8211f */
snps,reset-delays-us = <0 15000 50000>;
tx_delay = <0x3c>;
rx_delay = <0x2f>;
status = "okay";
@ -61,10 +57,6 @@ &gmac1m1_tx_bus2
&gmac1m1_rx_bus2
&gmac1m1_rgmii_clk
&gmac1m1_rgmii_bus>;
snps,reset-gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
/* Reset time is 15ms, 50ms for rtl8211f */
snps,reset-delays-us = <0 15000 50000>;
tx_delay = <0x4f>;
rx_delay = <0x26>;
status = "okay";
@ -76,6 +68,9 @@ rgmii_phy0: ethernet-phy@1 {
reg = <0x1>;
pinctrl-0 = <&eth_phy0_reset_pin>;
pinctrl-names = "default";
reset-assert-us = <20000>;
reset-deassert-us = <100000>;
reset-gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>;
};
};
@ -85,6 +80,9 @@ rgmii_phy1: ethernet-phy@1 {
reg = <0x1>;
pinctrl-0 = <&eth_phy1_reset_pin>;
pinctrl-names = "default";
reset-assert-us = <20000>;
reset-deassert-us = <100000>;
reset-gpios = <&gpio1 RK_PB1 GPIO_ACTIVE_LOW>;
};
};