diff --git a/Documentation/ABI/testing/sysfs-firmware-lefi-boardinfo b/Documentation/ABI/testing/sysfs-firmware-lefi-boardinfo index 5e3f6148c52e..abea10ace557 100644 --- a/Documentation/ABI/testing/sysfs-firmware-lefi-boardinfo +++ b/Documentation/ABI/testing/sysfs-firmware-lefi-boardinfo @@ -12,19 +12,18 @@ Description: requirement and specific for Loongson64, so only add a new boardinfo.c file in arch/mips/loongson64. - For example: + For example:: - [loongson@linux ~]$ cat /sys/firmware/lefi/boardinfo - Board Info - Manufacturer : LEMOTE - Board Name : LEMOTE-LS3A4000-7A1000-1w-V01-pc - Family : LOONGSON3 + [loongson@linux ~]$ cat /sys/firmware/lefi/boardinfo + Board Info + Manufacturer : LEMOTE + Board Name : LEMOTE-LS3A4000-7A1000-1w-V01-pc + Family : LOONGSON3 - BIOS Info - Vendor : Kunlun - Version : Kunlun-A1901-V4.1.3-20200414093938 - ROM Size : 4 KB - Release Date : 2020-04-14 + BIOS Info + Vendor : Kunlun + Version : Kunlun-A1901-V4.1.3-20200414093938 + Release Date : 2020-04-14 By the way, using dmidecode command can get the similar info if there exists SMBIOS in firmware, but the fact is that there is no SMBIOS on diff --git a/arch/mips/Makefile b/arch/mips/Makefile index cff1a9a43b89..c84e5dbcb25c 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -285,23 +285,27 @@ cflags-y += -I$(srctree)/arch/mips/include/asm/mach-generic drivers-$(CONFIG_PCI) += arch/mips/pci/ # -# Automatically detect the build format. By default we choose -# the elf format according to the load address. -# We can always force a build with a 64-bits symbol format by -# passing 'KBUILD_SYM32=no' option to the make's command line. +# Automatically detect whether to build a 64-bit kernel using symbols +# limited to 32-bit values, which produces more compact code. This +# relies on the kernel image being linked at a 32-bit load address, +# which we use to infer whether to use this arrangement for symbols. +# Use 'make KBUILD_SYM32=n' to override this default choice and force +# 64-bit symbols to be used instead. # -ifdef CONFIG_64BIT - ifndef KBUILD_SYM32 - ifeq ($(shell expr $(load-y) \< 0xffffffff80000000), 0) - KBUILD_SYM32 = $(call cc-option-yn, -msym32) +ifdef need-compiler + ifdef CONFIG_64BIT + ifndef KBUILD_SYM32 + ifeq ($(shell expr $(load-y) \< 0xffffffff80000000), 0) + KBUILD_SYM32 = $(call cc-option-yn, -msym32) + endif endif - endif - ifeq ($(KBUILD_SYM32), y) - cflags-$(KBUILD_SYM32) += -msym32 -DKBUILD_64BIT_SYM32 - else - ifeq ($(CONFIG_CPU_DADDI_WORKAROUNDS), y) - $(error CONFIG_CPU_DADDI_WORKAROUNDS unsupported without -msym32) + ifeq ($(KBUILD_SYM32), y) + cflags-y += -msym32 -DKBUILD_64BIT_SYM32 + else + ifeq ($(CONFIG_CPU_DADDI_WORKAROUNDS), y) + $(error CONFIG_CPU_DADDI_WORKAROUNDS unsupported without -msym32) + endif endif endif endif diff --git a/arch/mips/alchemy/common/clock.c b/arch/mips/alchemy/common/clock.c index 62a7304ff35f..b5d2cbb7c69e 100644 --- a/arch/mips/alchemy/common/clock.c +++ b/arch/mips/alchemy/common/clock.c @@ -150,7 +150,7 @@ static const struct clk_ops alchemy_clkops_cpu = { static struct clk __init *alchemy_clk_setup_cpu(const char *parent_name, int ctype) { - struct clk_init_data id; + struct clk_init_data id = {}; struct clk_hw *h; struct clk *clk; @@ -245,7 +245,7 @@ static struct clk __init *alchemy_clk_setup_aux(const char *parent_name, char *name, int maxmult, unsigned long reg) { - struct clk_init_data id; + struct clk_init_data id = {}; struct clk *c; struct alchemy_auxpll_clk *a; @@ -754,7 +754,7 @@ static const char * const alchemy_clk_fgen_names[] = { static int __init alchemy_clk_init_fgens(int ctype) { struct clk *c; - struct clk_init_data id; + struct clk_init_data id = {}; struct alchemy_fgcs_clk *a; unsigned long v; int i, ret; @@ -959,9 +959,9 @@ static int alchemy_csrc_dt2[] = { 1, 4, 3, 2 }; /* Au1300 */ static int __init alchemy_clk_setup_imux(int ctype) { + struct clk_init_data id = {}; struct alchemy_fgcs_clk *a; const char * const *names; - struct clk_init_data id; unsigned long v; int i, ret, *dt; struct clk *c; diff --git a/arch/mips/boot/dts/cavium-octeon/Makefile b/arch/mips/boot/dts/cavium-octeon/Makefile index 48085bca666c..aa3a5ff1468d 100644 --- a/arch/mips/boot/dts/cavium-octeon/Makefile +++ b/arch/mips/boot/dts/cavium-octeon/Makefile @@ -1,2 +1,3 @@ # SPDX-License-Identifier: GPL-2.0 dtb-$(CONFIG_CAVIUM_OCTEON_SOC) += octeon_3xxx.dtb octeon_68xx.dtb +dtb-$(CONFIG_OCTEON_BOARD_UBNT) += ubnt_e100.dtb diff --git a/arch/mips/boot/dts/pic32/pic32mzda.dtsi b/arch/mips/boot/dts/pic32/pic32mzda.dtsi index feca35ba56a4..433dff3cf14f 100644 --- a/arch/mips/boot/dts/pic32/pic32mzda.dtsi +++ b/arch/mips/boot/dts/pic32/pic32mzda.dtsi @@ -76,8 +76,6 @@ evic: interrupt-controller@1f810000 { }; pic32_pinctrl: pinctrl@1f801400 { - #address-cells = <1>; - #size-cells = <1>; compatible = "microchip,pic32mzda-pinctrl"; reg = <0x1f801400 0x400>; clocks = <&rootclk PB1CLK>; diff --git a/arch/mips/cavium-octeon/Kconfig b/arch/mips/cavium-octeon/Kconfig index 450e979ef5d9..f3618117cc39 100644 --- a/arch/mips/cavium-octeon/Kconfig +++ b/arch/mips/cavium-octeon/Kconfig @@ -89,4 +89,9 @@ config OCTEON_ILM To compile this driver as a module, choose M here. The module will be called octeon-ilm +config OCTEON_BOARD_UBNT + bool "Support Ubiquiti Devices" + help + Enable this for missing Ubiquit device trees and quirks + endif # CAVIUM_OCTEON_SOC diff --git a/arch/mips/cavium-octeon/Makefile b/arch/mips/cavium-octeon/Makefile index ab84ede0cbe0..c9b52c94a8ca 100644 --- a/arch/mips/cavium-octeon/Makefile +++ b/arch/mips/cavium-octeon/Makefile @@ -18,3 +18,5 @@ obj-y += executive/ obj-$(CONFIG_MTD) += flash_setup.o obj-$(CONFIG_SMP) += smp.o obj-$(CONFIG_OCTEON_ILM) += oct_ilm.o + +obj-$(CONFIG_OCTEON_BOARD_UBNT) += board-ubnt.o diff --git a/arch/mips/cavium-octeon/board-ubnt.c b/arch/mips/cavium-octeon/board-ubnt.c new file mode 100644 index 000000000000..e89ab3a02f49 --- /dev/null +++ b/arch/mips/cavium-octeon/board-ubnt.c @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include +#include + +static __init bool ubnt_e100_detect(void) +{ + return cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_UBNT_E100; +} + +extern const char __dtb_ubnt_e100_begin[]; + +MIPS_MACHINE(ubnt_e100) = { + .fdt = __dtb_ubnt_e100_begin, + .detect = ubnt_e100_detect, +}; diff --git a/arch/mips/cavium-octeon/dma-octeon.c b/arch/mips/cavium-octeon/dma-octeon.c index 9fbba6a8fa4c..c049632fbcc3 100644 --- a/arch/mips/cavium-octeon/dma-octeon.c +++ b/arch/mips/cavium-octeon/dma-octeon.c @@ -228,7 +228,7 @@ void __init plat_swiotlb_setup(void) swiotlbsize = 64 * (1<<20); } #endif -#ifdef CONFIG_USB_OHCI_HCD_PLATFORM +#if IS_ENABLED(CONFIG_USB_OHCI_HCD_PLATFORM) /* OCTEON II ohci is only 32-bit. */ if (OCTEON_IS_OCTEON2() && max_addr >= 0x100000000ul) swiotlbsize = 64 * (1<<20); diff --git a/arch/mips/cavium-octeon/executive/cvmx-helper.c b/arch/mips/cavium-octeon/executive/cvmx-helper.c index 1985cd66806a..107b1be4a45e 100644 --- a/arch/mips/cavium-octeon/executive/cvmx-helper.c +++ b/arch/mips/cavium-octeon/executive/cvmx-helper.c @@ -1014,7 +1014,6 @@ int cvmx_helper_initialize_packet_io_global(void) { int result = 0; int interface; - union cvmx_l2c_cfg l2c_cfg; const int num_interfaces = cvmx_helper_get_number_of_interfaces(); /* @@ -1029,10 +1028,21 @@ int cvmx_helper_initialize_packet_io_global(void) * to the cores. This avoids conditions where IO blocks might * be starved under very high L2 loads. */ - l2c_cfg.u64 = cvmx_read_csr(CVMX_L2C_CFG); - l2c_cfg.s.lrf_arb_mode = 0; - l2c_cfg.s.rfb_arb_mode = 0; - cvmx_write_csr(CVMX_L2C_CFG, l2c_cfg.u64); + if (OCTEON_IS_MODEL(OCTEON_CN6XXX)) { + union cvmx_l2c_ctl l2c_ctl; + + l2c_ctl.u64 = cvmx_read_csr(CVMX_L2C_CTL); + l2c_ctl.s.rsp_arb_mode = 1; + l2c_ctl.s.xmc_arb_mode = 0; + cvmx_write_csr(CVMX_L2C_CTL, l2c_ctl.u64); + } else { + union cvmx_l2c_cfg l2c_cfg; + + l2c_cfg.u64 = cvmx_read_csr(CVMX_L2C_CFG); + l2c_cfg.s.lrf_arb_mode = 0; + l2c_cfg.s.rfb_arb_mode = 0; + cvmx_write_csr(CVMX_L2C_CFG, l2c_cfg.u64); + } cvmx_pko_initialize_global(); for (interface = 0; interface < num_interfaces; interface++) { diff --git a/arch/mips/cavium-octeon/executive/cvmx-l2c.c b/arch/mips/cavium-octeon/executive/cvmx-l2c.c index 33b303691bc2..373907e1e668 100644 --- a/arch/mips/cavium-octeon/executive/cvmx-l2c.c +++ b/arch/mips/cavium-octeon/executive/cvmx-l2c.c @@ -54,7 +54,7 @@ int cvmx_l2c_get_core_way_partition(uint32_t core) if (core >= cvmx_octeon_num_cores()) return -1; - if (OCTEON_IS_MODEL(OCTEON_CN63XX)) + if (OCTEON_IS_MODEL(OCTEON_CN6XXX)) return cvmx_read_csr(CVMX_L2C_WPAR_PPX(core)) & 0xffff; /* @@ -91,14 +91,14 @@ int cvmx_l2c_set_core_way_partition(uint32_t core, uint32_t mask) mask &= valid_mask; /* A UMSK setting which blocks all L2C Ways is an error on some chips */ - if (mask == valid_mask && !OCTEON_IS_MODEL(OCTEON_CN63XX)) + if (mask == valid_mask && !OCTEON_IS_MODEL(OCTEON_CN6XXX)) return -1; /* Validate the core number */ if (core >= cvmx_octeon_num_cores()) return -1; - if (OCTEON_IS_MODEL(OCTEON_CN63XX)) { + if (OCTEON_IS_MODEL(OCTEON_CN6XXX)) { cvmx_write_csr(CVMX_L2C_WPAR_PPX(core), mask); return 0; } @@ -147,10 +147,10 @@ int cvmx_l2c_set_hw_way_partition(uint32_t mask) mask &= valid_mask; /* A UMSK setting which blocks all L2C Ways is an error on some chips */ - if (mask == valid_mask && !OCTEON_IS_MODEL(OCTEON_CN63XX)) + if (mask == valid_mask && !OCTEON_IS_MODEL(OCTEON_CN6XXX)) return -1; - if (OCTEON_IS_MODEL(OCTEON_CN63XX)) + if (OCTEON_IS_MODEL(OCTEON_CN6XXX)) cvmx_write_csr(CVMX_L2C_WPAR_IOBX(0), mask); else cvmx_write_csr(CVMX_L2C_SPAR4, @@ -160,7 +160,7 @@ int cvmx_l2c_set_hw_way_partition(uint32_t mask) int cvmx_l2c_get_hw_way_partition(void) { - if (OCTEON_IS_MODEL(OCTEON_CN63XX)) + if (OCTEON_IS_MODEL(OCTEON_CN6XXX)) return cvmx_read_csr(CVMX_L2C_WPAR_IOBX(0)) & 0xffff; else return cvmx_read_csr(CVMX_L2C_SPAR4) & (0xFF); @@ -313,7 +313,7 @@ static void fault_in(uint64_t addr, int len) int cvmx_l2c_lock_line(uint64_t addr) { - if (OCTEON_IS_MODEL(OCTEON_CN63XX)) { + if (OCTEON_IS_MODEL(OCTEON_CN6XXX)) { int shift = CVMX_L2C_TAG_ADDR_ALIAS_SHIFT; uint64_t assoc = cvmx_l2c_get_num_assoc(); uint64_t tag = addr >> shift; @@ -460,7 +460,7 @@ void cvmx_l2c_flush(void) int cvmx_l2c_unlock_line(uint64_t address) { - if (OCTEON_IS_MODEL(OCTEON_CN63XX)) { + if (OCTEON_IS_MODEL(OCTEON_CN6XXX)) { int assoc; union cvmx_l2c_tag tag; uint32_t tag_addr; @@ -661,7 +661,7 @@ union cvmx_l2c_tag cvmx_l2c_get_tag(uint32_t association, uint32_t index) (int)index, cvmx_l2c_get_num_sets()); return tag; } - if (OCTEON_IS_MODEL(OCTEON_CN63XX)) { + if (OCTEON_IS_MODEL(OCTEON_CN6XXX)) { union cvmx_l2c_tadx_tag l2c_tadx_tag; uint64_t address = CVMX_ADD_SEG(CVMX_MIPS_SPACE_XKPHYS, (association << CVMX_L2C_TAG_ADDR_ALIAS_SHIFT) | @@ -745,7 +745,7 @@ uint32_t cvmx_l2c_address_to_index(uint64_t addr) } if (indxalias) { - if (OCTEON_IS_MODEL(OCTEON_CN63XX)) { + if (OCTEON_IS_MODEL(OCTEON_CN6XXX)) { uint32_t a_14_12 = (idx / (CVMX_L2C_MEMBANK_SELECT_SIZE/(1< select the way of the cache block involved in diff --git a/arch/mips/cavium-octeon/flash_setup.c b/arch/mips/cavium-octeon/flash_setup.c index 3395acde4d60..66d173b57c3f 100644 --- a/arch/mips/cavium-octeon/flash_setup.c +++ b/arch/mips/cavium-octeon/flash_setup.c @@ -22,7 +22,7 @@ static struct map_info flash_map; static struct mtd_info *mymtd; static const char *part_probe_types[] = { "cmdlinepart", -#ifdef CONFIG_MTD_REDBOOT_PARTS +#if IS_ENABLED(CONFIG_MTD_REDBOOT_PARTS) "RedBoot", #endif NULL diff --git a/arch/mips/cavium-octeon/octeon-memcpy.S b/arch/mips/cavium-octeon/octeon-memcpy.S index fef0c6de3fa1..fb27126afc56 100644 --- a/arch/mips/cavium-octeon/octeon-memcpy.S +++ b/arch/mips/cavium-octeon/octeon-memcpy.S @@ -60,7 +60,7 @@ * 3- (dst - src) == (dst_entry - src_entry), * The _entry suffix denotes values when __copy_user was called. * - * (1) is set up up by uaccess.h and maintained by not writing AT in copy_user + * (1) is set up by uaccess.h and maintained by not writing AT in copy_user * (2) is met by incrementing src by the number of bytes copied * (3) is met by not doing loads between a pair of increments of dst and src * diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c index 1ad2602a0383..7497be7b9431 100644 --- a/arch/mips/cavium-octeon/setup.c +++ b/arch/mips/cavium-octeon/setup.c @@ -30,6 +30,7 @@ #include #include +#include #include #include #include @@ -653,6 +654,24 @@ void octeon_user_io_init(void) write_c0_derraddr1(0); } +#ifdef CONFIG_CAVIUM_OCTEON_LOCK_L2 +static bool __init octeon_l2_is_crippled(void) +{ + /* + * L2D_FUS3 exists on CN3XXX/CN5XXX only. On OCTEON II the + * crippled-L2 fuses live in MIO_FUS_DAT3[l2c_crip]. + */ + if (OCTEON_IS_MODEL(OCTEON_CN6XXX)) { + union cvmx_mio_fus_dat3 fus_dat3; + + fus_dat3.u64 = cvmx_read_csr(CVMX_MIO_FUS_DAT3); + return fus_dat3.s.l2c_crip != 0; + } + + return cvmx_read_csr(CVMX_L2D_FUS3) & (3ull << 34); +} +#endif + /** * prom_init - Early entry point for arch setup */ @@ -801,7 +820,7 @@ void __init prom_init(void) } #ifdef CONFIG_CAVIUM_OCTEON_LOCK_L2 - if (cvmx_read_csr(CVMX_L2D_FUS3) & (3ull << 34)) { + if (octeon_l2_is_crippled()) { pr_info("Skipping L2 locking due to reduced L2 cache size\n"); } else { uint32_t __maybe_unused ebase = read_c0_ebase() & 0x3ffff000; @@ -1109,7 +1128,7 @@ EXPORT_SYMBOL(prom_putchar); void __init prom_free_prom_memory(void) { - if (OCTEON_IS_MODEL(OCTEON_CN6XXX)) { + if (OCTEON_IS_MODEL(OCTEON_CN63XX_PASS1_X)) { /* Check for presence of Core-14449 fix. */ u32 insn; u32 *foo; @@ -1141,7 +1160,7 @@ void __init octeon_fill_mac_addresses(void); void __init device_tree_init(void) { - const void *fdt; + const void *fdt = NULL; bool do_prune; bool fill_mac; @@ -1160,12 +1179,28 @@ void __init device_tree_init(void) do_prune = false; fill_mac = false; pr_info("Using passed Device Tree.\n"); - } else if (OCTEON_IS_MODEL(OCTEON_CN68XX)) { - fdt = &__dtb_octeon_68xx_begin; - do_prune = true; - fill_mac = true; } else { - fdt = &__dtb_octeon_3xxx_begin; + const struct mips_machine *check_mach; + + for_each_mips_machine(check_mach) { + if (!check_mach->detect) + continue; + if (!check_mach->detect()) + continue; + + fdt = check_mach->fdt; + do_prune = false; + fill_mac = true; + pr_info("Using compiled-in Device Tree.\n"); + break; + } + } + + if (!fdt) { + if (OCTEON_IS_MODEL(OCTEON_CN68XX)) + fdt = &__dtb_octeon_68xx_begin; + else + fdt = &__dtb_octeon_3xxx_begin; do_prune = true; fill_mac = true; } diff --git a/arch/mips/configs/decstation_64_defconfig b/arch/mips/configs/decstation_64_defconfig index 8afb8ac3ed78..62efc81b394f 100644 --- a/arch/mips/configs/decstation_64_defconfig +++ b/arch/mips/configs/decstation_64_defconfig @@ -1,27 +1,27 @@ +CONFIG_WERROR=y CONFIG_SYSVIPC=y CONFIG_POSIX_MQUEUE=y CONFIG_HIGH_RES_TIMERS=y +CONFIG_BPF_SYSCALL=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_BSD_PROCESS_ACCT_V3=y CONFIG_LOG_BUF_SHIFT=15 CONFIG_EXPERT=y # CONFIG_SGETMASK_SYSCALL is not set -# CONFIG_SYSFS_SYSCALL is not set -CONFIG_BPF_SYSCALL=y -# CONFIG_COMPAT_BRK is not set CONFIG_MACH_DECSTATION=y CONFIG_64BIT=y -CONFIG_PAGE_SIZE_16KB=y CONFIG_TC=y CONFIG_MIPS32_O32=y CONFIG_MIPS32_N32=y # CONFIG_SUSPEND is not set +CONFIG_PAGE_SIZE_16KB=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_MODULE_SRCVERSION_ALL=y CONFIG_PARTITION_ADVANCED=y CONFIG_OSF_PARTITION=y # CONFIG_EFI_PARTITION is not set +# CONFIG_COMPAT_BRK is not set CONFIG_TRANSPARENT_HUGEPAGE=y CONFIG_NET=y CONFIG_PACKET=y @@ -49,7 +49,6 @@ CONFIG_NETWORK_SECMARK=y CONFIG_IP_SCTP=m CONFIG_VLAN_8021Q=m # CONFIG_WIRELESS is not set -# CONFIG_UEVENT_HELPER is not set # CONFIG_FW_LOADER is not set # CONFIG_ALLOW_DEV_COREDUMP is not set CONFIG_MTD=m @@ -83,9 +82,9 @@ CONFIG_DECLANCE=y # CONFIG_NET_VENDOR_MICREL is not set # CONFIG_NET_VENDOR_MICROCHIP is not set # CONFIG_NET_VENDOR_MICROSEMI is not set +# CONFIG_NET_VENDOR_NI is not set # CONFIG_NET_VENDOR_NATSEMI is not set # CONFIG_NET_VENDOR_NETRONOME is not set -# CONFIG_NET_VENDOR_NI is not set # CONFIG_NET_VENDOR_QUALCOMM is not set # CONFIG_NET_VENDOR_RENESAS is not set # CONFIG_NET_VENDOR_ROCKER is not set @@ -114,13 +113,11 @@ CONFIG_FB_TGA=y CONFIG_FB_PMAG_AA=y CONFIG_FB_PMAG_BA=y CONFIG_FB_PMAGB_B=y -# CONFIG_VGA_CONSOLE is not set CONFIG_DUMMY_CONSOLE_COLUMNS=160 CONFIG_DUMMY_CONSOLE_ROWS=64 CONFIG_FRAMEBUFFER_CONSOLE=y CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y CONFIG_LOGO=y -# CONFIG_LOGO_LINUX_VGA16 is not set # CONFIG_LOGO_LINUX_CLUT224 is not set # CONFIG_HID is not set # CONFIG_USB_SUPPORT is not set @@ -168,31 +165,24 @@ CONFIG_NLS_ISO8859_14=m CONFIG_NLS_ISO8859_15=m CONFIG_NLS_UTF8=m CONFIG_CRYPTO_RSA=m -CONFIG_CRYPTO_CCM=m -CONFIG_CRYPTO_GCM=m -CONFIG_CRYPTO_CHACHA20POLY1305=m -CONFIG_CRYPTO_CTS=m -CONFIG_CRYPTO_LRW=m -CONFIG_CRYPTO_OFB=m -CONFIG_CRYPTO_XTS=m -CONFIG_CRYPTO_CMAC=m -CONFIG_CRYPTO_XCBC=m -CONFIG_CRYPTO_CRC32=m -CONFIG_CRYPTO_MD4=m -CONFIG_CRYPTO_RMD160=m -CONFIG_CRYPTO_SHA512=m -CONFIG_CRYPTO_WP512=m -CONFIG_CRYPTO_ANUBIS=m -CONFIG_CRYPTO_ARC4=m CONFIG_CRYPTO_BLOWFISH=m CONFIG_CRYPTO_CAMELLIA=m CONFIG_CRYPTO_CAST5=m CONFIG_CRYPTO_CAST6=m -CONFIG_CRYPTO_KHAZAD=m -CONFIG_CRYPTO_SEED=m CONFIG_CRYPTO_SERPENT=m -CONFIG_CRYPTO_TEA=m CONFIG_CRYPTO_TWOFISH=m +CONFIG_CRYPTO_CTS=m +CONFIG_CRYPTO_LRW=m +CONFIG_CRYPTO_XTS=m +CONFIG_CRYPTO_CHACHA20POLY1305=m +CONFIG_CRYPTO_CCM=m +CONFIG_CRYPTO_CMAC=m +CONFIG_CRYPTO_MD4=m +CONFIG_CRYPTO_RMD160=m +CONFIG_CRYPTO_SHA512=m +CONFIG_CRYPTO_WP512=m +CONFIG_CRYPTO_XCBC=m +CONFIG_CRYPTO_CRC32=m CONFIG_CRYPTO_LZO=m CONFIG_CRYPTO_842=m CONFIG_CRYPTO_LZ4=m diff --git a/arch/mips/dec/setup.c b/arch/mips/dec/setup.c index 78ad28ac16db..645473f4e098 100644 --- a/arch/mips/dec/setup.c +++ b/arch/mips/dec/setup.c @@ -18,16 +18,16 @@ #include #include #include +#include #include #include #include -#include #include #include -#include #include #include +#include #include #include #include diff --git a/arch/mips/generic/board-jaguar2.its.S b/arch/mips/generic/board-jaguar2.its.S index c2b8d479b26c..a91a06f1254f 100644 --- a/arch/mips/generic/board-jaguar2.its.S +++ b/arch/mips/generic/board-jaguar2.its.S @@ -28,13 +28,11 @@ description = "Jaguar2 Linux kernel"; kernel = "kernel"; fdt = "fdt-jaguar2_pcb110"; - ramdisk = "ramdisk"; }; pcb111 { description = "Jaguar2 Linux kernel"; kernel = "kernel"; fdt = "fdt-jaguar2_pcb111"; - ramdisk = "ramdisk"; }; }; }; diff --git a/arch/mips/generic/board-serval.its.S b/arch/mips/generic/board-serval.its.S index dde833efe980..3b89e208d29a 100644 --- a/arch/mips/generic/board-serval.its.S +++ b/arch/mips/generic/board-serval.its.S @@ -18,7 +18,6 @@ description = "Serval Linux kernel"; kernel = "kernel"; fdt = "fdt-serval_pcb105"; - ramdisk = "ramdisk"; }; }; }; diff --git a/arch/mips/include/asm/amon.h b/arch/mips/include/asm/amon.h deleted file mode 100644 index 3cc03c64a9c7..000000000000 --- a/arch/mips/include/asm/amon.h +++ /dev/null @@ -1,12 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2013 Imagination Technologies Ltd. - * - * Arbitrary Monitor Support (AMON) - */ -int amon_cpu_avail(int cpu); -int amon_cpu_start(int cpu, unsigned long pc, unsigned long sp, - unsigned long gp, unsigned long a0); diff --git a/arch/mips/include/asm/cmp.h b/arch/mips/include/asm/cmp.h deleted file mode 100644 index 71e20e6cd38d..000000000000 --- a/arch/mips/include/asm/cmp.h +++ /dev/null @@ -1,10 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef _ASM_CMP_H -#define _ASM_CMP_H - -/* - * Definitions for CMP multitasking on MIPS cores - */ -struct task_struct; - -#endif /* _ASM_CMP_H */ diff --git a/arch/mips/include/asm/dec/reset.h b/arch/mips/include/asm/dec/reset.h index 6af49f3f24da..caf60ef0edd0 100644 --- a/arch/mips/include/asm/dec/reset.h +++ b/arch/mips/include/asm/dec/reset.h @@ -10,6 +10,7 @@ #define __ASM_DEC_RESET_H #include +#include void __noreturn dec_machine_restart(char *command); void __noreturn dec_machine_halt(void); diff --git a/arch/mips/include/asm/gt64120.h b/arch/mips/include/asm/gt64120.h index 5d68d726598a..2ad770ff3c56 100644 --- a/arch/mips/include/asm/gt64120.h +++ b/arch/mips/include/asm/gt64120.h @@ -45,8 +45,6 @@ #define GT_PCI1M0HD_OFS 0x0a8 #define GT_PCI1M1LD_OFS 0x0b0 #define GT_PCI1M1HD_OFS 0x0b8 -#define GT_PCI1M1LD_OFS 0x0b0 -#define GT_PCI1M1HD_OFS 0x0b8 #define GT_SCS10AR_OFS 0x0d0 #define GT_SCS32AR_OFS 0x0d8 diff --git a/arch/mips/include/asm/mach-loongson64/boot_param.h b/arch/mips/include/asm/mach-loongson64/boot_param.h index 3a11ce85762b..3e5c2b3a7f9b 100644 --- a/arch/mips/include/asm/mach-loongson64/boot_param.h +++ b/arch/mips/include/asm/mach-loongson64/boot_param.h @@ -24,7 +24,7 @@ struct efi_memory_map_loongson { u16 vers; /* version of efi_memory_map */ u32 nr_map; /* number of memory_maps */ - u32 mem_freq; /* memory frequence */ + u32 mem_freq; /* memory frequency */ struct mem_map { u32 node_id; /* node_id which memory attached to */ u32 mem_type; /* system memory, pci memory, pci io, etc. */ diff --git a/arch/mips/include/asm/mips-boards/sead3-addr.h b/arch/mips/include/asm/mips-boards/sead3-addr.h deleted file mode 100644 index c0db57802f7c..000000000000 --- a/arch/mips/include/asm/mips-boards/sead3-addr.h +++ /dev/null @@ -1,83 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2015 Imagination Technologies, Inc. - * written by Ralf Baechle - */ -#ifndef __ASM_MIPS_BOARDS_SEAD3_ADDR_H -#define __ASM_MIPS_BOARDS_SEAD3_ADDR_H - -/* - * Target #0 Register Decode - */ -#define SEAD3_SD_SPDCNF 0xbb000040 -#define SEAD3_SD_SPADDR 0xbb000048 -#define SEAD3_SD_DATA 0xbb000050 - -/* - * Target #1 Register Decode - */ -#define SEAD3_CFG 0xbb100110 -#define SEAD3_GIC_BASE_ADDRESS 0xbb1c0000 -#define SEAD3_SHARED_SECTION 0xbb1c0000 -#define SEAD3_VPE_LOCAL_SECTION 0xbb1c8000 -#define SEAD3_VPE_OTHER_SECTION 0xbb1cc000 -#define SEAD3_USER_MODE_VISIBLE_SECTION 0xbb1d0000 - -/* - * Target #3 Register Decode - */ -#define SEAD3_USB_HS_BASE 0xbb200000 -#define SEAD3_USB_HS_IDENTIFICATION_REGS 0xbb200000 -#define SEAD3_USB_HS_CAPABILITY_REGS 0xbb200100 -#define SEAD3_USB_HS_OPERATIONAL_REGS 0xbb200140 -#define SEAD3_RESERVED 0xbe800000 - -/* - * Target #3 Register Decode - */ -#define SEAD3_SRAM 0xbe000000 -#define SEAD3_OPTIONAL_SRAM 0xbe400000 -#define SEAD3_FPGA 0xbf000000 - -#define SEAD3_PI_PIC32_USB_STATUS 0xbf000060 -#define SEAD3_PI_PIC32_USB_STATUS_IO_RDY (1 << 0) -#define SEAD3_PI_PIC32_USB_STATUS_SPL_INT (1 << 1) -#define SEAD3_PI_PIC32_USB_STATUS_GPIOA_INT (1 << 2) -#define SEAD3_PI_PIC32_USB_STATUS_GPIOB_INT (1 << 3) - -#define SEAD3_PI_SOFT_ENDIAN 0xbf000070 - -#define SEAD3_CPLD_P_SWITCH 0xbf000200 -#define SEAD3_CPLD_F_SWITCH 0xbf000208 -#define SEAD3_CPLD_P_LED 0xbf000210 -#define SEAD3_CPLD_F_LED 0xbf000218 -#define SEAD3_NEWSC_LIVE 0xbf000220 -#define SEAD3_NEWSC_REG 0xbf000228 -#define SEAD3_NEWSC_CTRL 0xbf000230 - -#define SEAD3_LCD_CONTROL 0xbf000400 -#define SEAD3_LCD_DATA 0xbf000408 -#define SEAD3_CPLD_LCD_STATUS 0xbf000410 -#define SEAD3_CPLD_LCD_DATA 0xbf000418 - -#define SEAD3_CPLD_PI_DEVRST 0xbf000480 -#define SEAD3_CPLD_PI_DEVRST_IC32_RST (1 << 0) -#define SEAD3_RESERVED_0 0xbf000500 - -#define SEAD3_PIC32_REGISTERS 0xbf000600 -#define SEAD3_RESERVED_1 0xbf000700 -#define SEAD3_UART_CH_0 0xbf000800 -#define SEAD3_UART_CH_1 0xbf000900 -#define SEAD3_RESERVED_2 0xbf000a00 -#define SEAD3_ETHERNET 0xbf010000 -#define SEAD3_RESERVED_3 0xbf020000 -#define SEAD3_USER_EXPANSION 0xbf400000 -#define SEAD3_RESERVED_4 0xbf800000 -#define SEAD3_BOOT_FLASH_EXTENSION 0xbfa00000 -#define SEAD3_BOOT_FLASH 0xbfc00000 -#define SEAD3_REVISION_REGISTER 0xbfc00010 - -#endif /* __ASM_MIPS_BOARDS_SEAD3_ADDR_H */ diff --git a/arch/mips/lib/memcpy.S b/arch/mips/lib/memcpy.S index 84f85aba6f4b..49408c0049f2 100644 --- a/arch/mips/lib/memcpy.S +++ b/arch/mips/lib/memcpy.S @@ -79,7 +79,7 @@ * 3- (dst - src) == (dst_entry - src_entry), * The _entry suffix denotes values when __copy_user was called. * - * (1) is set up up by uaccess.h and maintained by not writing AT in copy_user + * (1) is set up by uaccess.h and maintained by not writing AT in copy_user * (2) is met by incrementing src by the number of bytes copied * (3) is met by not doing loads between a pair of increments of dst and src * diff --git a/arch/mips/mm/mmap.c b/arch/mips/mm/mmap.c index 5d2a1225785b..119edaa928f3 100644 --- a/arch/mips/mm/mmap.c +++ b/arch/mips/mm/mmap.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include @@ -72,8 +73,11 @@ static unsigned long arch_get_unmapped_area_common(struct file *filp, } info.length = len; - info.align_mask = do_color_align ? (PAGE_MASK & shm_align_mask) : 0; info.align_offset = pgoff << PAGE_SHIFT; + if (filp && is_file_hugepages(filp)) + info.align_mask = huge_page_mask_align(filp); + else + info.align_mask = do_color_align ? (PAGE_MASK & shm_align_mask) : 0; if (dir == DOWN) { info.flags = VM_UNMAPPED_AREA_TOPDOWN; diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c index 24fe85fa169d..78bafa317fa6 100644 --- a/arch/mips/mm/tlb-r4k.c +++ b/arch/mips/mm/tlb-r4k.c @@ -332,6 +332,19 @@ void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte) /* this could be a huge page */ if (pmd_leaf(*pmdp)) { unsigned long lo; + + /* + * The probe above only covers the 8K pair at @address, and + * a huge mapping is installed with the huge-aligned address + * while the refill that started the fault left a 4K entry + * for the faulting page elsewhere in the range. Writing the + * huge entry to a random index would leave two entries + * matching the faulting address; leave it to the refill and + * TLBL/TLBS handlers, which probe the faulting address. + */ + if (idx < 0) + goto out; + write_c0_pagemask(PM_HUGE_MASK); ptep = (pte_t *)pmdp; lo = pte_to_entrylo(pte_val(*ptep)); @@ -339,10 +352,7 @@ void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte) write_c0_entrylo1(lo + (HPAGE_SIZE >> 7)); mtc0_tlbw_hazard(); - if (idx < 0) - tlb_write_random(); - else - tlb_write_indexed(); + tlb_write_indexed(); tlbw_use_hazard(); write_c0_pagemask(PM_DEFAULT_MASK); } else @@ -380,6 +390,9 @@ void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte) tlb_write_indexed(); } tlbw_use_hazard(); +#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT +out: +#endif htw_start(); flush_micro_tlb_vm(vma); diff --git a/arch/mips/n64/init.c b/arch/mips/n64/init.c index 66ec28ab41f3..ddbd7d1224d3 100644 --- a/arch/mips/n64/init.c +++ b/arch/mips/n64/init.c @@ -20,7 +20,7 @@ #define IO_MEM_RESOURCE_END 0x1fffffffUL /* - * System-specifc irq names for clarity + * System-specific irq names for clarity */ #define MIPS_CPU_IRQ(x) (MIPS_CPU_IRQ_BASE + (x)) #define MIPS_SOFTINT0_IRQ MIPS_CPU_IRQ(0) diff --git a/arch/mips/rb532/gpio.c b/arch/mips/rb532/gpio.c index 49e1a15a3827..458895a9fb25 100644 --- a/arch/mips/rb532/gpio.c +++ b/arch/mips/rb532/gpio.c @@ -192,13 +192,8 @@ EXPORT_SYMBOL(rb532_gpio_set_func); static int rb532_gpio_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; - struct resource *res; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) - return -EINVAL; - - rb532_gpio_chip->regbase = devm_ioremap_resource(dev, res); + rb532_gpio_chip->regbase = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(rb532_gpio_chip->regbase)) return PTR_ERR(rb532_gpio_chip->regbase);