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Devicetree changes for omaps for v5.12 merge window
This includes the following earlier patches that were considered too late for v5.11 as discussed between Arnd and me on freenode #armlinux in December: - More updates to use cpsw switchdev driver - Enable gta04 PMIC power management - Updates for dra7 for ECC support, 1.8GHz speed and keep the ldo0 regulator always on as specified in the data manual And then we have the new devicetree changes: - Configure the original Amazon Echo to for audio - Configure missing thermal interrupt for omap4430 - Configure mapphone devices for passive thermal cooling, and add 1.2GHz mode. - Correct omap4430 sgx clock rate to use the runtime Android kernel value, the earlier value was for a lower power operating point - Drop turbo mode for 1GHz omap3 variants as we now have passive cooling configured - Update email address for Javier - Add new MYIR Tech Limited board support -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAmASaj4RHHRvbnlAYXRv bWlkZS5jb20ACgkQG9Q+yVyrpXO7mBAAj/5zpwT9PS565m+GQZ9Ng8M/xYrIHMDw lQDwzCAHMab4ZMN1fw3PhXUl9Wvnwm4UIlnqELx9BLFtCaFUOFulgj62wkeb9VLT hqvOTCEXeK3CvLzcT1RxOnw9YedUOm+E0p8hWujM6PhqaN93LvlqMiS+ZotbQ7LT sjB/2GYoHJ1+xZlS13+Gylf5MlHN0iisSMFMAX6hMoLxX2FXsDTuef45cTe9Jy3/ tH8O/W5CHe61dspPFft4L7W4rjkRDNztv/35TRIqb1qq7a8s7Lk1LJLjlMXCTk+Z Y6lPTsUv8+HGldpEEPM+I9P26l9+LZcsCv39veM2YpamnJ4Ln5KzOSjX5I3J3UK+ BOADh8Va/04g/+JsJrVxBUs3Z7Edxz//cXnaMPZfp8OW1g2vgAJkjwWcukYVArmL /OmscZpuKELpflvdZa+puLXNUgVqSKlvR3Rq49MAeji1RhyEUMHdCQVibd/urnJr ngwg319JE2mgOtQqmZgsp0xyYE6sh141xhZRdK2X1kvvsjMjNirrbQ6JLCGZLoYv rWL7Psh4n+DvpzBk/Y+fow1/8A/lg3XK7Pd1XhB5Kes+EIQSFFSGnD7ZIrSJitGj aem+uqIijOE2egN5nBDHM6sbYgTQEIr41Y2fE3LbvjdBZBQfZA0NqIGiobgRt4mv MnLRfJ/+ZtY= =HqBS -----END PGP SIGNATURE----- Merge tag 'omap-for-v5.12/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt Devicetree changes for omaps for v5.12 merge window This includes the following earlier patches that were considered too late for v5.11 as discussed between Arnd and me on freenode #armlinux in December: - More updates to use cpsw switchdev driver - Enable gta04 PMIC power management - Updates for dra7 for ECC support, 1.8GHz speed and keep the ldo0 regulator always on as specified in the data manual And then we have the new devicetree changes: - Configure the original Amazon Echo to for audio - Configure missing thermal interrupt for omap4430 - Configure mapphone devices for passive thermal cooling, and add 1.2GHz mode. - Correct omap4430 sgx clock rate to use the runtime Android kernel value, the earlier value was for a lower power operating point - Drop turbo mode for 1GHz omap3 variants as we now have passive cooling configured - Update email address for Javier - Add new MYIR Tech Limited board support * tag 'omap-for-v5.12/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: am335x-myirtech-*: Add DT for AM335X MYIR Tech Limited board ARM: dts: omap3-igep: Change email address in copyright notice ARM: dts: omap36xx: Remove turbo mode for 1GHz variants ARM: dts: omap443x: Correct sgx clock to 307.2MHz as used on motorola vendor kernel ARM: dts: motorola-mapphone: Add 1.2GHz OPP ARM: dts: motorola-mapphone: Configure lower temperature passive cooling ARM: dts: Configure missing thermal interrupt for 4430 ARM: dts: omap3-echo: Add speaker sound card support ARM: dts: dra71-evm: mark ldo0 regulator as always on ARM: dts: dra76x: add support for OPP_PLUS ARM: dts: am574x-idk: add support for EMIF1 ECC ARM: dts: omap3-gta04: fix twl4030-power settings ARM: dts: am335x-evm/evmsk/icev2: switch to new cpsw switch drv ARM: dts: am33xx-l4: add dt node for new cpsw switchdev driver Link: https://lore.kernel.org/r/pull-1611845066-809577@atomide.com-2 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
2226c89413
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@ -817,6 +817,7 @@ dtb-$(CONFIG_SOC_AM33XX) += \
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am335x-lxm.dtb \
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am335x-moxa-uc-2101.dtb \
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am335x-moxa-uc-8100-me-t.dtb \
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am335x-myirtech-myd.dtb \
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am335x-nano.dtb \
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am335x-netcan-plus-1xx.dtb \
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am335x-netcom-plus-2xx.dtb \
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@ -684,28 +684,31 @@ vmmc_reg: regulator@12 {
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};
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};
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&mac {
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&mac_sw {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&cpsw_default>;
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pinctrl-1 = <&cpsw_sleep>;
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status = "okay";
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slaves = <1>;
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};
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&davinci_mdio {
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&davinci_mdio_sw {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&davinci_mdio_default>;
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pinctrl-1 = <&davinci_mdio_sleep>;
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status = "okay";
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ethphy0: ethernet-phy@0 {
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reg = <0>;
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};
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};
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&cpsw_emac0 {
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&cpsw_port1 {
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phy-handle = <ðphy0>;
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phy-mode = "rgmii-id";
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ti,dual-emac-pvid = <1>;
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};
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&cpsw_port2 {
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status = "disabled";
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};
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&tscadc {
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@ -596,19 +596,17 @@ vmmc_reg: regulator@12 {
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};
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};
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&mac {
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&mac_sw {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&cpsw_default>;
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pinctrl-1 = <&cpsw_sleep>;
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dual_emac = <1>;
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status = "okay";
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};
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&davinci_mdio {
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&davinci_mdio_sw {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&davinci_mdio_default>;
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pinctrl-1 = <&davinci_mdio_sleep>;
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status = "okay";
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ethphy0: ethernet-phy@0 {
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reg = <0>;
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@ -619,16 +617,16 @@ ethphy1: ethernet-phy@1 {
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};
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};
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&cpsw_emac0 {
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&cpsw_port1 {
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phy-handle = <ðphy0>;
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phy-mode = "rgmii-id";
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dual_emac_res_vlan = <1>;
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ti,dual-emac-pvid = <1>;
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};
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&cpsw_emac1 {
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&cpsw_port2 {
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phy-handle = <ðphy1>;
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phy-mode = "rgmii-id";
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dual_emac_res_vlan = <2>;
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ti,dual-emac-pvid = <2>;
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};
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&mmc1 {
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@ -474,31 +474,29 @@ p10 {
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};
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};
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&cpsw_emac0 {
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&cpsw_port1 {
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phy-handle = <ðphy0>;
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phy-mode = "rmii";
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dual_emac_res_vlan = <1>;
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ti,dual-emac-pvid = <1>;
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};
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&cpsw_emac1 {
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&cpsw_port2 {
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phy-handle = <ðphy1>;
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phy-mode = "rmii";
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dual_emac_res_vlan = <2>;
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ti,dual-emac-pvid = <2>;
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};
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&mac {
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&mac_sw {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&cpsw_default>;
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pinctrl-1 = <&cpsw_sleep>;
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status = "okay";
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dual_emac;
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};
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&davinci_mdio {
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&davinci_mdio_sw {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&davinci_mdio_default>;
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pinctrl-1 = <&davinci_mdio_sleep>;
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status = "okay";
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reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
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reset-delay-us = <2>; /* PHY datasheet states 1uS min */
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267
arch/arm/boot/dts/am335x-myirtech-myc.dtsi
Normal file
267
arch/arm/boot/dts/am335x-myirtech-myc.dtsi
Normal file
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@ -0,0 +1,267 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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/* SPDX-FileCopyrightText: Alexander Shiyan, <shc_work@mail.ru> */
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/* Based on code by myc_c335x.dts, MYiRtech.com */
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/* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ */
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/dts-v1/;
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#include "am33xx.dtsi"
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/leds/common.h>
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/ {
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model = "MYIR MYC-AM335X";
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compatible = "myir,myc-am335x", "ti,am33xx";
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cpus {
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cpu@0 {
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cpu0-supply = <&vdd_core>;
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voltage-tolerance = <2>;
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};
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};
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memory@80000000 {
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device_type = "memory";
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reg = <0x80000000 0x10000000>;
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};
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vdd_mod: vdd_mod_reg {
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compatible = "regulator-fixed";
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regulator-name = "vdd-mod";
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regulator-always-on;
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regulator-boot-on;
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};
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vdd_core: vdd_core_reg {
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compatible = "regulator-fixed";
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regulator-name = "vdd-core";
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regulator-always-on;
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regulator-boot-on;
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vin-supply = <&vdd_mod>;
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};
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leds: leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&led_mod_pins>;
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led_mod: led_mod {
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label = "module:user";
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gpios = <&gpio3 18 GPIO_ACTIVE_LOW>;
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color = <LED_COLOR_ID_GREEN>;
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default-state = "off";
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panic-indicator;
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};
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};
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};
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&cpsw_emac0 {
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phy-handle = <&phy0>;
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phy-mode = "rgmii-id";
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};
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&davinci_mdio {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&mdio_pins_default>;
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pinctrl-1 = <&mdio_pins_sleep>;
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status = "okay";
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phy0: ethernet-phy@4 {
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reg = <4>;
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};
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};
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&elm {
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status = "okay";
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};
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&gpmc {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&nand_pins_default>;
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pinctrl-1 = <&nand_pins_sleep>;
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ranges = <0 0 0x8000000 0x1000000>;
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status = "okay";
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nand0: nand@0,0 {
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compatible = "ti,omap2-nand";
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reg = <0 0 4>;
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interrupt-parent = <&gpmc>;
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interrupts = <0 IRQ_TYPE_NONE>, <1 IRQ_TYPE_NONE>;
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nand-bus-width = <8>;
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rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>;
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gpmc,device-width = <1>;
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gpmc,sync-clk-ps = <0>;
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gpmc,cs-on-ns = <0>;
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gpmc,cs-rd-off-ns = <44>;
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gpmc,cs-wr-off-ns = <44>;
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gpmc,adv-on-ns = <6>;
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gpmc,adv-rd-off-ns = <34>;
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gpmc,adv-wr-off-ns = <44>;
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gpmc,we-on-ns = <0>;
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gpmc,we-off-ns = <40>;
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gpmc,oe-on-ns = <0>;
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gpmc,oe-off-ns = <54>;
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gpmc,access-ns = <64>;
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gpmc,rd-cycle-ns = <82>;
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gpmc,wr-cycle-ns = <82>;
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gpmc,bus-turnaround-ns = <0>;
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gpmc,cycle2cycle-delay-ns = <0>;
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gpmc,clk-activation-ns = <0>;
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gpmc,wr-access-ns = <40>;
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gpmc,wr-data-mux-bus-ns = <0>;
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ti,elm-id = <&elm>;
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ti,nand-ecc-opt = "bch8";
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#address-cells = <1>;
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#size-cells = <1>;
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};
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};
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&i2c0 {
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pinctrl-names = "default", "gpio", "sleep";
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pinctrl-0 = <&i2c0_pins_default>;
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pinctrl-1 = <&i2c0_pins_gpio>;
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pinctrl-2 = <&i2c0_pins_sleep>;
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clock-frequency = <400000>;
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scl-gpios = <&gpio3 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio3 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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status = "okay";
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eeprom: eeprom@50 {
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compatible = "atmel,24c32";
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reg = <0x50>;
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pagesize = <32>;
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vcc-supply = <&vdd_mod>;
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};
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};
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&mac {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <ð_slave1_pins_default>;
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pinctrl-1 = <ð_slave1_pins_sleep>;
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slaves = <1>;
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status = "okay";
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};
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&rtc {
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system-power-controller;
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};
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&am33xx_pinmux {
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mdio_pins_default: pinmux_mdio_pins_default {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0) /* mdio_data */
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AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0) /* mdio_clk */
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>;
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};
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mdio_pins_sleep: pinmux_mdio_pins_sleep {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7)
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>;
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};
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eth_slave1_pins_default: pinmux_eth_slave1_pins_default {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii1_tctl */
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AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2) /* rgmii1_rctl */
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii1_td3 */
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii1_td2 */
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii1_td1 */
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii1_td0 */
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AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii1_tclk */
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AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2) /* rgmii1_rclk */
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2) /* rgmii1_rd3 */
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE2) /* rgmii1_rd2 */
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE2) /* rgmii1_rd1 */
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE2) /* rgmii1_rd0 */
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>;
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};
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eth_slave1_pins_sleep: pinmux_eth_slave1_pins_sleep {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
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||||
AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
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||||
>;
|
||||
};
|
||||
|
||||
i2c0_pins_default: pinmux_i2c0_pins_default {
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||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT | SLEWCTRL_FAST, MUX_MODE0) /* I2C0_SDA */
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||||
AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT | SLEWCTRL_FAST, MUX_MODE0) /* I2C0_SCL */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c0_pins_gpio: pinmux_i2c0_pins_gpio {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT, MUX_MODE7) /* gpio3[5] */
|
||||
AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT, MUX_MODE7) /* gpio3[6] */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c0_pins_sleep: pinmux_i2c0_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
led_mod_pins: pinmux_led_mod_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpio3[18] */
|
||||
>;
|
||||
};
|
||||
|
||||
nand_pins_default: pinmux_nand_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE0) /* gpmc_ad0 */
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE0) /* gpmc_ad1 */
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE0) /* gpmc_ad2 */
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE0) /* gpmc_ad3 */
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE0) /* gpmc_ad4 */
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE0) /* gpmc_ad5 */
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE0) /* gpmc_ad6 */
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE0) /* gpmc_ad7 */
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE0) /* gpmc_wait0 */
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLUP, MUX_MODE7) /* gpio0[31] */
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT, MUX_MODE0) /* gpmc_csn0 */
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_OUTPUT, MUX_MODE0) /* gpmc_advn_ale */
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_OUTPUT, MUX_MODE0) /* gpmc_oen_ren */
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_OUTPUT, MUX_MODE0) /* gpmc_wen */
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_BEN0_CLE, PIN_OUTPUT, MUX_MODE0) /* gpmc_be0n_cle */
|
||||
>;
|
||||
};
|
||||
|
||||
nand_pins_sleep: pinmux_nand_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_BEN0_CLE, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
};
|
||||
536
arch/arm/boot/dts/am335x-myirtech-myd.dts
Normal file
536
arch/arm/boot/dts/am335x-myirtech-myd.dts
Normal file
|
|
@ -0,0 +1,536 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/* SPDX-FileCopyrightText: Alexander Shiyan, <shc_work@mail.ru> */
|
||||
/* Based on code by myd_c335x.dts, MYiRtech.com */
|
||||
/* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ */
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "am335x-myirtech-myc.dtsi"
|
||||
|
||||
#include <dt-bindings/display/tda998x.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
|
||||
/ {
|
||||
model = "MYIR MYD-AM335X";
|
||||
compatible = "myir,myd-am335x", "myir,myc-am335x", "ti,am33xx";
|
||||
|
||||
chosen {
|
||||
stdout-path = &uart0;
|
||||
};
|
||||
|
||||
clk12m: clk12m {
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <12000000>;
|
||||
|
||||
#clock-cells = <0>;
|
||||
};
|
||||
|
||||
gpio_buttons: gpio_buttons {
|
||||
compatible = "gpio-keys";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gpio_buttons_pins>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
button1: button@0 {
|
||||
reg = <0>;
|
||||
label = "button1";
|
||||
linux,code = <BTN_1>;
|
||||
gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
button2: button@1 {
|
||||
reg = <1>;
|
||||
label = "button2";
|
||||
linux,code = <BTN_2>;
|
||||
gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
sound: sound {
|
||||
compatible = "simple-audio-card";
|
||||
simple-audio-card,format = "i2s";
|
||||
simple-audio-card,bitclock-master = <&master_codec>;
|
||||
simple-audio-card,frame-master = <&master_codec>;
|
||||
|
||||
simple-audio-card,cpu {
|
||||
sound-dai = <&mcasp0>;
|
||||
};
|
||||
|
||||
master_codec: simple-audio-card,codec@1 {
|
||||
sound-dai = <&sgtl5000>;
|
||||
};
|
||||
|
||||
simple-audio-card,codec@2 {
|
||||
sound-dai = <&tda9988>;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_5v0: vdd_5v0_reg {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vdd_5v0";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vdd_3v3: vdd_3v3_reg {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vdd-3v3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
vin-supply = <&vdd_5v0>;
|
||||
};
|
||||
};
|
||||
|
||||
&cpsw_emac1 {
|
||||
phy-handle = <&phy1>;
|
||||
phy-mode = "rgmii-id";
|
||||
};
|
||||
|
||||
&davinci_mdio {
|
||||
phy1: ethernet-phy@6 {
|
||||
reg = <6>;
|
||||
eee-broken-1000t;
|
||||
};
|
||||
};
|
||||
|
||||
&dcan0 {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&dcan0_pins_default>;
|
||||
pinctrl-1 = <&dcan0_pins_sleep>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dcan1 {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&dcan1_pins_default>;
|
||||
pinctrl-1 = <&dcan1_pins_sleep>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ehrpwm0 {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&ehrpwm0_pins_default>;
|
||||
pinctrl-1 = <&ehrpwm0_pins_sleep>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&epwmss0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
pinctrl-names = "default", "gpio", "sleep";
|
||||
pinctrl-0 = <&i2c1_pins_default>;
|
||||
pinctrl-1 = <&i2c1_pins_gpio>;
|
||||
pinctrl-2 = <&i2c1_pins_sleep>;
|
||||
clock-frequency = <400000>;
|
||||
scl-gpios = <&gpio0 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
sda-gpios = <&gpio0 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
status = "okay";
|
||||
|
||||
sgtl5000: sgtl5000@a {
|
||||
compatible = "fsl,sgtl5000";
|
||||
reg =<0xa>;
|
||||
clocks = <&clk12m>;
|
||||
micbias-resistor-k-ohms = <4>;
|
||||
micbias-voltage-m-volts = <2250>;
|
||||
VDDA-supply = <&vdd_3v3>;
|
||||
VDDIO-supply = <&vdd_3v3>;
|
||||
|
||||
#sound-dai-cells = <0>;
|
||||
};
|
||||
|
||||
tda9988: tda9988@70 {
|
||||
compatible = "nxp,tda998x";
|
||||
reg =<0x70>;
|
||||
audio-ports = <TDA998x_I2S 1>;
|
||||
|
||||
#sound-dai-cells = <0>;
|
||||
|
||||
ports {
|
||||
port@0 {
|
||||
hdmi_0: endpoint@0 {
|
||||
remote-endpoint = <&lcdc_0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&lcdc {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&lcdc_pins_default>;
|
||||
pinctrl-1 = <&lcdc_pins_sleep>;
|
||||
blue-and-red-wiring = "straight";
|
||||
status = "okay";
|
||||
|
||||
port {
|
||||
lcdc_0: endpoint@0 {
|
||||
remote-endpoint = <&hdmi_0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&leds {
|
||||
pinctrl-0 = <&led_mod_pins &leds_pins>;
|
||||
|
||||
led1: led1 {
|
||||
label = "base:user1";
|
||||
gpios = <&gpio0 27 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led2: led2 {
|
||||
label = "base:user2";
|
||||
gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
&mac {
|
||||
pinctrl-0 = <ð_slave1_pins_default>, <ð_slave2_pins_default>;
|
||||
pinctrl-1 = <ð_slave1_pins_sleep>, <ð_slave2_pins_sleep>;
|
||||
slaves = <2>;
|
||||
};
|
||||
|
||||
&mcasp0 {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&mcasp0_pins_default>;
|
||||
pinctrl-1 = <&mcasp0_pins_sleep>;
|
||||
op-mode = <0>;
|
||||
tdm-slots = <2>;
|
||||
serial-dir = <0 1 2 0>;
|
||||
tx-num-evt = <32>;
|
||||
rx-num-evt = <32>;
|
||||
status = "okay";
|
||||
|
||||
#sound-dai-cells = <0>;
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&mmc1_pins_default>;
|
||||
pinctrl-1 = <&mmc1_pins_sleep>;
|
||||
cd-gpios = <&gpio3 21 GPIO_ACTIVE_LOW>;
|
||||
bus-width = <4>;
|
||||
vmmc-supply = <&vdd_3v3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&nand0 {
|
||||
partition@0 {
|
||||
label = "MLO";
|
||||
reg = <0x00000 0x20000>;
|
||||
};
|
||||
|
||||
partition@20000 {
|
||||
label = "boot";
|
||||
reg = <0x20000 0x80000>;
|
||||
};
|
||||
};
|
||||
|
||||
&tscadc {
|
||||
status = "okay";
|
||||
|
||||
adc: adc {
|
||||
ti,adc-channels = <0 1 2 3 4 5 6>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&uart1_pins_default>;
|
||||
pinctrl-1 = <&uart1_pins_sleep>;
|
||||
linux,rs485-enabled-at-boot-time;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&uart2_pins_default>;
|
||||
pinctrl-1 = <&uart2_pins_sleep>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&usb_pins>;
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
dr_mode = "otg";
|
||||
};
|
||||
|
||||
&usb0_phy {
|
||||
vcc-supply = <&vdd_5v0>;
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
||||
&usb1_phy {
|
||||
vcc-supply = <&vdd_5v0>;
|
||||
};
|
||||
|
||||
&vdd_mod {
|
||||
vin-supply = <&vdd_3v3>;
|
||||
};
|
||||
|
||||
&am33xx_pinmux {
|
||||
dcan0_pins_default: pinmux_dcan0_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_OUTPUT, MUX_MODE2) /* dcan0_tx_mux2 */
|
||||
AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT, MUX_MODE2) /* dcan0_rx_mux2 */
|
||||
>;
|
||||
};
|
||||
|
||||
dcan0_pins_sleep: pinmux_dcan0_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
dcan1_pins_default: pinmux_dcan1_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_OUTPUT, MUX_MODE2) /* dcan1_tx_mux0 */
|
||||
AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT, MUX_MODE2) /* dcan1_rx_mux0 */
|
||||
>;
|
||||
};
|
||||
|
||||
dcan1_pins_sleep: pinmux_dcan1_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
ehrpwm0_pins_default: pinmux_ehrpwm0_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_OUTPUT, MUX_MODE3) /* ehrpwm0A_mux1 */
|
||||
>;
|
||||
};
|
||||
|
||||
ehrpwm0_pins_sleep: pinmux_ehrpwm0_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
eth_slave2_pins_default: pinmux_eth_slave2_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii2_tctl */
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLDOWN, MUX_MODE2) /* rgmii2_rctl */
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii2_td3 */
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii2_td2 */
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii2_td1 */
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii2_td0 */
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* rgmii2_tclk */
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_INPUT_PULLDOWN, MUX_MODE2) /* rgmii2_rclk */
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_INPUT_PULLDOWN, MUX_MODE2) /* rgmii2_rd3 */
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLDOWN, MUX_MODE2) /* rgmii2_rd2 */
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE2 /* rgmii2_rd1 */)
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE2 /* rgmii2_rd0 */)
|
||||
>;
|
||||
};
|
||||
|
||||
eth_slave2_pins_sleep: pinmux_eth_slave2_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
gpio_buttons_pins: pinmux_gpio_buttons_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpio3[0] */
|
||||
AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT, MUX_MODE7) /* gpio0[29] */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c1_pins_default: pinmux_i2c1_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT | SLEWCTRL_FAST, MUX_MODE2) /* I2C1_SDA_mux3 */
|
||||
AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT | SLEWCTRL_FAST, MUX_MODE2) /* I2C1_SCL_mux3 */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c1_pins_gpio: pinmux_i2c1_pins_gpio {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT, MUX_MODE7) /* gpio0[4] */
|
||||
AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT, MUX_MODE7) /* gpio0[5] */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c1_pins_sleep: pinmux_i2c1_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
lcdc_pins_default: pinmux_lcdc_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0) /* lcd_data0 */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0) /* lcd_data1 */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0) /* lcd_data2 */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0) /* lcd_data3 */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0) /* lcd_data4 */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0) /* lcd_data5 */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0) /* lcd_data6 */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0) /* lcd_data7 */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0) /* lcd_data8 */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0) /* lcd_data9 */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0) /* lcd_data10 */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0) /* lcd_data11 */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0) /* lcd_data12 */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0) /* lcd_data13 */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0) /* lcd_data14 */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0) /* lcd_data15 */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT, MUX_MODE0) /* lcd_vsync */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT, MUX_MODE0) /* lcd_hsync */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT, MUX_MODE0) /* lcd_pclk */
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT, MUX_MODE0) /* lcd_ac_bias_en */
|
||||
>;
|
||||
};
|
||||
|
||||
lcdc_pins_sleep: pinmux_lcdc_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PULL_DISABLE, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PULL_DISABLE, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PULL_DISABLE, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PULL_DISABLE, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PULL_DISABLE, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PULL_DISABLE, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PULL_DISABLE, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PULL_DISABLE, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PULL_DISABLE, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PULL_DISABLE, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PULL_DISABLE, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PULL_DISABLE, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PULL_DISABLE, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PULL_DISABLE, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PULL_DISABLE, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PULL_DISABLE, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
leds_pins: pinmux_leds_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_OUTPUT, MUX_MODE7) /* gpio0[27] */
|
||||
AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT, MUX_MODE7) /* gpio0[3] */
|
||||
>;
|
||||
};
|
||||
|
||||
mcasp0_pins_default: pinmux_mcasp0_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_INPUT_PULLDOWN, MUX_MODE0) /* mcasp0_aclkx_mux0 */
|
||||
AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_INPUT_PULLDOWN, MUX_MODE0) /* mcasp0_fsx_mux0 */
|
||||
AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mcasp0_axr2_mux0 */
|
||||
AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR1, PIN_INPUT_PULLDOWN, MUX_MODE0) /* mcasp0_axr1_mux0 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcasp0_pins_sleep: pinmux_mcasp0_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR1, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins_default: pinmux_mmc1_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0) /* mmc0_dat3 */
|
||||
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0) /* mmc0_dat2 */
|
||||
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0) /* mmc0_dat1 */
|
||||
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0) /* mmc0_dat0 */
|
||||
AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0) /* mmc0_clk */
|
||||
AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0) /* mmc0_cmd */
|
||||
AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLUP, MUX_MODE7) /* gpio3[21] */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins_sleep: pinmux_mmc1_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLDOWN, MUX_MODE0)
|
||||
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLDOWN, MUX_MODE0)
|
||||
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLDOWN, MUX_MODE0)
|
||||
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLDOWN, MUX_MODE0)
|
||||
AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLDOWN, MUX_MODE0)
|
||||
AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLDOWN, MUX_MODE0)
|
||||
AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
uart0_pins: pinmux_uart0_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0) /* uart0_rxd */
|
||||
AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0) /* uart0_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
uart1_pins_default: pinmux_uart1_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0) /* uart1_rxd */
|
||||
AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0) /* uart1_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
uart1_pins_sleep: pinmux_uart1_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
uart2_pins_default: pinmux_uart2_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT, MUX_MODE6) /* uart2_rxd_mux1 */
|
||||
AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_OUTPUT, MUX_MODE6) /* uart2_txd_mux1 */
|
||||
>;
|
||||
};
|
||||
|
||||
uart2_pins_sleep: pinmux_uart2_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
usb_pins: pinmux_usb_pins {
|
||||
pinctrl-single,pins = <
|
||||
AM33XX_PADCONF(AM335X_PIN_USB0_DRVVBUS, PIN_OUTPUT_PULLDOWN, MUX_MODE0) /* USB0_DRVVBUS */
|
||||
AM33XX_PADCONF(AM335X_PIN_USB1_DRVVBUS, PIN_OUTPUT_PULLDOWN, MUX_MODE0) /* USB1_DRVVBUS */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -765,6 +765,55 @@ cpsw_emac1: slave@300 {
|
|||
phys = <&phy_gmii_sel 2 1>;
|
||||
};
|
||||
};
|
||||
|
||||
mac_sw: switch@0 {
|
||||
compatible = "ti,am335x-cpsw-switch", "ti,cpsw-switch";
|
||||
reg = <0x0 0x4000>;
|
||||
ranges = <0 0 0x4000>;
|
||||
clocks = <&cpsw_125mhz_gclk>;
|
||||
clock-names = "fck";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
syscon = <&scm_conf>;
|
||||
status = "disabled";
|
||||
|
||||
interrupts = <40 41 42 43>;
|
||||
interrupt-names = "rx_thresh", "rx", "tx", "misc";
|
||||
|
||||
ethernet-ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpsw_port1: port@1 {
|
||||
reg = <1>;
|
||||
label = "port1";
|
||||
mac-address = [ 00 00 00 00 00 00 ];
|
||||
phys = <&phy_gmii_sel 1 1>;
|
||||
};
|
||||
|
||||
cpsw_port2: port@2 {
|
||||
reg = <2>;
|
||||
label = "port2";
|
||||
mac-address = [ 00 00 00 00 00 00 ];
|
||||
phys = <&phy_gmii_sel 2 1>;
|
||||
};
|
||||
};
|
||||
|
||||
davinci_mdio_sw: mdio@1000 {
|
||||
compatible = "ti,cpsw-mdio","ti,davinci_mdio";
|
||||
clocks = <&cpsw_125mhz_gclk>;
|
||||
clock-names = "fck";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
bus_freq = <1000000>;
|
||||
reg = <0x1000 0x100>;
|
||||
};
|
||||
|
||||
cpts {
|
||||
clocks = <&cpsw_cpts_rft_clk>;
|
||||
clock-names = "cpts";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
target-module@180000 { /* 0x4a180000, ap 5 10.0 */
|
||||
|
|
|
|||
|
|
@ -39,3 +39,7 @@ &mmc2 {
|
|||
&m_can0 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&emif1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -112,6 +112,8 @@ lp8733_ldo0_reg: ldo0 {
|
|||
regulator-name = "lp8733-ldo0";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
lp8733_ldo1_reg: ldo1 {
|
||||
|
|
|
|||
|
|
@ -9,6 +9,13 @@ / {
|
|||
compatible = "ti,dra762", "ti,dra7";
|
||||
|
||||
ocp {
|
||||
emif1: emif@4c000000 {
|
||||
compatible = "ti,emif-dra7xx";
|
||||
reg = <0x4c000000 0x200>;
|
||||
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
target-module@42c01900 {
|
||||
compatible = "ti,sysc-dra7-mcan", "ti,sysc";
|
||||
ranges = <0x0 0x42c00000 0x2000>;
|
||||
|
|
@ -133,3 +140,32 @@ &mmc3 {
|
|||
/* dra76x is not affected by i887 */
|
||||
max-frequency = <96000000>;
|
||||
};
|
||||
|
||||
&cpu0_opp_table {
|
||||
opp_plus@1800000000 {
|
||||
opp-hz = /bits/ 64 <1800000000>;
|
||||
opp-microvolt = <1250000 950000 1250000>,
|
||||
<1250000 950000 1250000>;
|
||||
opp-supported-hw = <0xFF 0x08>;
|
||||
};
|
||||
};
|
||||
|
||||
&opp_supply_mpu {
|
||||
ti,efuse-settings = <
|
||||
/* uV offset */
|
||||
1060000 0x0
|
||||
1160000 0x4
|
||||
1210000 0x8
|
||||
1250000 0xC
|
||||
>;
|
||||
};
|
||||
|
||||
&abb_mpu {
|
||||
ti,abb_info = <
|
||||
/*uV ABB efuse rbb_m fbb_m vset_m*/
|
||||
1060000 0 0x0 0 0x02000000 0x01F00000
|
||||
1160000 0 0x4 0 0x02000000 0x01F00000
|
||||
1210000 0 0x8 0 0x02000000 0x01F00000
|
||||
1250000 0 0xC 0 0x02000000 0x01F00000
|
||||
>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -169,6 +169,29 @@ backlight: backlight {
|
|||
};
|
||||
};
|
||||
|
||||
&cpu_thermal {
|
||||
polling-delay = <10000>; /* milliseconds */
|
||||
};
|
||||
|
||||
&cpu_alert0 {
|
||||
temperature = <80000>; /* millicelsius */
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
/*
|
||||
* Note that the 1.2GiHz mode is enabled for all SoC variants for
|
||||
* the Motorola Android Linux v3.0.8 based kernel.
|
||||
*/
|
||||
operating-points = <
|
||||
/* kHz uV */
|
||||
300000 1025000
|
||||
600000 1200000
|
||||
800000 1313000
|
||||
1008000 1375000
|
||||
1200000 1375000
|
||||
>;
|
||||
};
|
||||
|
||||
&dss {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -86,6 +86,38 @@ &gpio3 12 GPIO_ACTIVE_HIGH /* GPIO_76 */
|
|||
linux,axis = <REL_X>;
|
||||
rotary-encoder,relative-axis;
|
||||
};
|
||||
|
||||
speaker_amp: speaker-amplifier {
|
||||
compatible = "simple-audio-amplifier";
|
||||
enable-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; /* gpio_129 */
|
||||
sound-name-prefix = "Speaker Amp";
|
||||
VCC-supply = <&vcc1v8>;
|
||||
};
|
||||
|
||||
sound {
|
||||
compatible = "simple-audio-card";
|
||||
simple-audio-card,name = "Misto Speaker";
|
||||
simple-audio-card,widgets =
|
||||
"Speaker", "Speaker";
|
||||
simple-audio-card,routing =
|
||||
"Speaker Amp INL", "HPL",
|
||||
"Speaker Amp INR", "HPR",
|
||||
"Speaker", "Speaker Amp OUTL",
|
||||
"Speaker", "Speaker Amp OUTR";
|
||||
simple-audio-card,format = "i2s";
|
||||
simple-audio-card,bitclock-master = <&sound_master>;
|
||||
simple-audio-card,frame-master = <&sound_master>;
|
||||
simple-audio-card,aux-devs = <&speaker_amp>;
|
||||
|
||||
simple-audio-card,cpu {
|
||||
sound-dai = <&mcbsp2>;
|
||||
};
|
||||
|
||||
sound_master: simple-audio-card,codec {
|
||||
sound-dai = <&codec0>;
|
||||
system-clock-frequency = <19200000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
|
|
@ -96,6 +128,13 @@ tps: tps@2d {
|
|||
};
|
||||
};
|
||||
|
||||
&mcbsp2 {
|
||||
status = "okay";
|
||||
#sound-dai-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mcbsp2_pins>;
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <400000>;
|
||||
|
||||
|
|
@ -277,6 +316,22 @@ chan8 {
|
|||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
clock-frequency = <400000>;
|
||||
|
||||
codec0: codec@18 {
|
||||
#sound-dai-cells = <0>;
|
||||
compatible = "ti,tlv320aic32x4";
|
||||
reg = <0x18>;
|
||||
clocks = <&sys_clkout1>;
|
||||
clock-names = "mclk";
|
||||
ldoin-supply = <&vcc1v8>;
|
||||
iov-supply = <&vcc1v8>;
|
||||
reset-gpios = <&gpio3 10 GPIO_ACTIVE_LOW>; /* gpio_74 */
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
#include "tps65910.dtsi"
|
||||
|
||||
&omap3_pmx_core {
|
||||
|
|
@ -290,6 +345,9 @@ button_pins: pinmux_button_pins {
|
|||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x20dc, PIN_INPUT | MUX_MODE4) /* dss_data0.gpio_70 */
|
||||
OMAP3_CORE1_IOPAD(0x20e0, PIN_INPUT | MUX_MODE4) /* dss_data2.gpio_72 */
|
||||
OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE4) /* dss_data4.gpio_74 */
|
||||
OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* dss_data15.gpio_85 */
|
||||
OMAP3_CORE1_IOPAD(0x2a1a, PIN_OUTPUT | MUX_MODE0) /* sys_clkout1.sys_clkout1 */
|
||||
>;
|
||||
};
|
||||
|
||||
|
|
@ -318,6 +376,15 @@ OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat6.sdmmc2_d
|
|||
OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat7.sdmmc2_dat7 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcbsp2_pins: pinmux_mcbsp2_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx.mcbsp2_fsx */
|
||||
OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0) /* mcbsp2_clkx.mcbsp2_clkx */
|
||||
OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0) /* mcbsp2_dr.mcbsp2.dr */
|
||||
OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dx.mcbsp2_dx */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&omap3_pmx_core2 {
|
||||
|
|
|
|||
|
|
@ -489,8 +489,8 @@ codec {
|
|||
};
|
||||
|
||||
twl_power: power {
|
||||
compatible = "ti,twl4030-power";
|
||||
ti,use_poweroff;
|
||||
compatible = "ti,twl4030-power-idle";
|
||||
ti,system-power-controller;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -2,7 +2,7 @@
|
|||
/*
|
||||
* Common device tree for IGEP boards based on AM/DM37x
|
||||
*
|
||||
* Copyright (C) 2012 Javier Martinez Canillas <javier@osg.samsung.com>
|
||||
* Copyright (C) 2012 Javier Martinez Canillas <javier@dowhile0.org>
|
||||
* Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
|
||||
*/
|
||||
/dts-v1/;
|
||||
|
|
|
|||
|
|
@ -2,7 +2,7 @@
|
|||
/*
|
||||
* Common Device Tree Source for IGEPv2
|
||||
*
|
||||
* Copyright (C) 2014 Javier Martinez Canillas <javier@osg.samsung.com>
|
||||
* Copyright (C) 2014 Javier Martinez Canillas <javier@dowhile0.org>
|
||||
* Copyright (C) 2014 Enric Balletbo i Serra <eballetbo@gmail.com>
|
||||
*/
|
||||
|
||||
|
|
|
|||
|
|
@ -2,7 +2,7 @@
|
|||
/*
|
||||
* Device Tree Source for IGEPv2 Rev. F (TI OMAP AM/DM37x)
|
||||
*
|
||||
* Copyright (C) 2012 Javier Martinez Canillas <javier@osg.samsung.com>
|
||||
* Copyright (C) Javier Martinez Canillas <javier@dowhile0.org>
|
||||
* Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
|
||||
*/
|
||||
|
||||
|
|
|
|||
|
|
@ -2,7 +2,7 @@
|
|||
/*
|
||||
* Device Tree Source for IGEPv2 Rev. C (TI OMAP AM/DM37x)
|
||||
*
|
||||
* Copyright (C) 2012 Javier Martinez Canillas <javier@osg.samsung.com>
|
||||
* Copyright (C) 2012 Javier Martinez Canillas <javier@dowhile0.org>
|
||||
* Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
|
||||
*/
|
||||
|
||||
|
|
|
|||
|
|
@ -2,7 +2,7 @@
|
|||
/*
|
||||
* Common Device Tree Source for IGEP COM MODULE
|
||||
*
|
||||
* Copyright (C) 2014 Javier Martinez Canillas <javier@osg.samsung.com>
|
||||
* Copyright (C) 2014 Javier Martinez Canillas <javier@dowhile0.org>
|
||||
* Copyright (C) 2014 Enric Balletbo i Serra <eballetbo@gmail.com>
|
||||
*/
|
||||
|
||||
|
|
|
|||
|
|
@ -2,7 +2,7 @@
|
|||
/*
|
||||
* Device Tree Source for IGEP COM MODULE Rev. G (TI OMAP AM/DM37x)
|
||||
*
|
||||
* Copyright (C) 2014 Javier Martinez Canillas <javier@osg.samsung.com>
|
||||
* Copyright (C) 2014 Javier Martinez Canillas <javier@dowhile0.org>
|
||||
* Copyright (C) 2014 Enric Balletbo i Serra <eballetbo@gmail.com>
|
||||
*/
|
||||
|
||||
|
|
|
|||
|
|
@ -2,7 +2,7 @@
|
|||
/*
|
||||
* Device Tree Source for IGEP COM MODULE Rev. E (TI OMAP AM/DM37x)
|
||||
*
|
||||
* Copyright (C) 2012 Javier Martinez Canillas <javier@osg.samsung.com>
|
||||
* Copyright (C) 2012 Javier Martinez Canillas <javier@dowhile0.org>
|
||||
* Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
|
||||
*/
|
||||
|
||||
|
|
|
|||
|
|
@ -72,7 +72,6 @@ opp1g-1000000000 {
|
|||
<1375000 1375000 1375000>;
|
||||
/* only on am/dm37x with speed-binned bit set */
|
||||
opp-supported-hw = <0xffffffff 2>;
|
||||
turbo-mode;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -33,10 +33,12 @@ thermal-zones {
|
|||
};
|
||||
|
||||
ocp {
|
||||
/* 4430 has only gpio_86 tshut and no talert interrupt */
|
||||
bandgap: bandgap@4a002260 {
|
||||
reg = <0x4a002260 0x4
|
||||
0x4a00232C 0x4>;
|
||||
compatible = "ti,omap4430-bandgap";
|
||||
gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
|
|
@ -76,11 +78,11 @@ &cpu_thermal {
|
|||
/include/ "omap443x-clocks.dtsi"
|
||||
|
||||
/*
|
||||
* Use dpll_per for sgx at 153.6MHz like droid4 stock v3.0.8 Android kernel
|
||||
* Use dpll_per for sgx at 307.2MHz like droid4 stock v3.0.8 Android kernel
|
||||
*/
|
||||
&sgx_module {
|
||||
assigned-clocks = <&l3_gfx_clkctrl OMAP4_GPU_CLKCTRL 24>,
|
||||
<&dpll_per_m7x2_ck>;
|
||||
assigned-clock-rates = <0>, <153600000>;
|
||||
assigned-clock-rates = <0>, <307200000>;
|
||||
assigned-clock-parents = <&dpll_per_m7x2_ck>;
|
||||
};
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user