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vfio: selftests: Add driver for Intel CBDMA
Add a driver for the Intel CBDMA device. This driver is based on and
named after the Linux driver for this device (drivers/dma/ioat/) and
also based on previous work from Peter Shier <pshier@google.com>.
The driver aims to be as simple as possible. It uses a single descriptor
to issue DMA operations, and only supports the copy operation. For "DMA
storms", the driver kicks off the maximum number of maximum-sized DMA
operations. On Skylake server parts, this was 2^16-1 copies of size 2M
and lasts about 15 seconds.
Create symlinks to drivers/dma/ioat/{hw.h,registers.h} to get access to
various macros (e.g. IOAT_CHANCMD_RESET) and struct ioat_dma_descriptor.
Cc: Dave Jiang <dave.jiang@intel.com>
Cc: Dan Williams <dan.j.williams@intel.com>
Acked-by: Dave Jiang <dave.jiang@intel.com>
Acked-by: Shuah Khan <skhan@linuxfoundation.org>
Signed-off-by: David Matlack <dmatlack@google.com>
Link: https://lore.kernel.org/r/20250822212518.4156428-20-dmatlack@google.com
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
This commit is contained in:
parent
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commit
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1
tools/testing/selftests/vfio/lib/drivers/ioat/hw.h
Symbolic link
1
tools/testing/selftests/vfio/lib/drivers/ioat/hw.h
Symbolic link
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@ -0,0 +1 @@
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../../../../../../../drivers/dma/ioat/hw.h
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235
tools/testing/selftests/vfio/lib/drivers/ioat/ioat.c
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235
tools/testing/selftests/vfio/lib/drivers/ioat/ioat.c
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// SPDX-License-Identifier: GPL-2.0-only
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#include <stdint.h>
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#include <unistd.h>
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#include <linux/errno.h>
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#include <linux/io.h>
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#include <linux/pci_ids.h>
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#include <linux/sizes.h>
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#include <vfio_util.h>
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#include "hw.h"
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#include "registers.h"
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#define IOAT_DMACOUNT_MAX UINT16_MAX
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struct ioat_state {
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/* Single descriptor used to issue DMA memcpy operations */
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struct ioat_dma_descriptor desc;
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/* Copy buffers used by ioat_send_msi() to generate an interrupt. */
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u64 send_msi_src;
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u64 send_msi_dst;
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};
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static inline struct ioat_state *to_ioat_state(struct vfio_pci_device *device)
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{
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return device->driver.region.vaddr;
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}
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static inline void *ioat_channel_registers(struct vfio_pci_device *device)
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{
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return device->bars[0].vaddr + IOAT_CHANNEL_MMIO_SIZE;
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}
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static int ioat_probe(struct vfio_pci_device *device)
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{
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u8 version;
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int r;
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if (!vfio_pci_device_match(device, PCI_VENDOR_ID_INTEL,
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PCI_DEVICE_ID_INTEL_IOAT_SKX))
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return -EINVAL;
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VFIO_ASSERT_NOT_NULL(device->bars[0].vaddr);
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version = readb(device->bars[0].vaddr + IOAT_VER_OFFSET);
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switch (version) {
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case IOAT_VER_3_2:
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case IOAT_VER_3_3:
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r = 0;
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break;
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default:
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printf("ioat: Unsupported version: 0x%x\n", version);
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r = -EINVAL;
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}
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return r;
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}
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static u64 ioat_channel_status(void *bar)
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{
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return readq(bar + IOAT_CHANSTS_OFFSET) & IOAT_CHANSTS_STATUS;
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}
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static void ioat_clear_errors(struct vfio_pci_device *device)
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{
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void *registers = ioat_channel_registers(device);
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u32 errors;
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errors = vfio_pci_config_readl(device, IOAT_PCI_CHANERR_INT_OFFSET);
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vfio_pci_config_writel(device, IOAT_PCI_CHANERR_INT_OFFSET, errors);
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errors = vfio_pci_config_readl(device, IOAT_PCI_DMAUNCERRSTS_OFFSET);
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vfio_pci_config_writel(device, IOAT_PCI_CHANERR_INT_OFFSET, errors);
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errors = readl(registers + IOAT_CHANERR_OFFSET);
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writel(errors, registers + IOAT_CHANERR_OFFSET);
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}
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static void ioat_reset(struct vfio_pci_device *device)
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{
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void *registers = ioat_channel_registers(device);
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u32 sleep_ms = 1, attempts = 5000 / sleep_ms;
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u8 chancmd;
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ioat_clear_errors(device);
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writeb(IOAT_CHANCMD_RESET, registers + IOAT2_CHANCMD_OFFSET);
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for (;;) {
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chancmd = readb(registers + IOAT2_CHANCMD_OFFSET);
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if (!(chancmd & IOAT_CHANCMD_RESET))
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break;
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VFIO_ASSERT_GT(--attempts, 0);
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usleep(sleep_ms * 1000);
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}
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VFIO_ASSERT_EQ(ioat_channel_status(registers), IOAT_CHANSTS_HALTED);
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}
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static void ioat_init(struct vfio_pci_device *device)
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{
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struct ioat_state *ioat = to_ioat_state(device);
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u8 intrctrl;
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VFIO_ASSERT_GE(device->driver.region.size, sizeof(*ioat));
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vfio_pci_config_writew(device, PCI_COMMAND,
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PCI_COMMAND_MEMORY |
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PCI_COMMAND_MASTER |
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PCI_COMMAND_INTX_DISABLE);
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ioat_reset(device);
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/* Enable the use of MXI-x interrupts for channel interrupts. */
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intrctrl = IOAT_INTRCTRL_MSIX_VECTOR_CONTROL;
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writeb(intrctrl, device->bars[0].vaddr + IOAT_INTRCTRL_OFFSET);
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vfio_pci_msix_enable(device, 0, device->msix_info.count);
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device->driver.msi = 0;
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device->driver.max_memcpy_size =
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1UL << readb(device->bars[0].vaddr + IOAT_XFERCAP_OFFSET);
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device->driver.max_memcpy_count = IOAT_DMACOUNT_MAX;
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}
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static void ioat_remove(struct vfio_pci_device *device)
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{
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ioat_reset(device);
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vfio_pci_msix_disable(device);
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}
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static void ioat_handle_error(struct vfio_pci_device *device)
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{
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void *registers = ioat_channel_registers(device);
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printf("Error detected during memcpy operation!\n"
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" CHANERR: 0x%x\n"
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" CHANERR_INT: 0x%x\n"
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" DMAUNCERRSTS: 0x%x\n",
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readl(registers + IOAT_CHANERR_OFFSET),
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vfio_pci_config_readl(device, IOAT_PCI_CHANERR_INT_OFFSET),
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vfio_pci_config_readl(device, IOAT_PCI_DMAUNCERRSTS_OFFSET));
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ioat_reset(device);
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}
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static int ioat_memcpy_wait(struct vfio_pci_device *device)
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{
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void *registers = ioat_channel_registers(device);
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u64 status;
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int r = 0;
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/* Wait until all operations complete. */
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for (;;) {
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status = ioat_channel_status(registers);
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if (status == IOAT_CHANSTS_DONE)
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break;
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if (status == IOAT_CHANSTS_HALTED) {
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ioat_handle_error(device);
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return -1;
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}
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}
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/* Put the channel into the SUSPENDED state. */
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writeb(IOAT_CHANCMD_SUSPEND, registers + IOAT2_CHANCMD_OFFSET);
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for (;;) {
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status = ioat_channel_status(registers);
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if (status == IOAT_CHANSTS_SUSPENDED)
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break;
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}
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return r;
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}
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static void __ioat_memcpy_start(struct vfio_pci_device *device,
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iova_t src, iova_t dst, u64 size,
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u16 count, bool interrupt)
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{
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void *registers = ioat_channel_registers(device);
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struct ioat_state *ioat = to_ioat_state(device);
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u64 desc_iova;
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u16 chanctrl;
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desc_iova = to_iova(device, &ioat->desc);
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ioat->desc = (struct ioat_dma_descriptor) {
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.ctl_f.op = IOAT_OP_COPY,
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.ctl_f.int_en = interrupt,
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.src_addr = src,
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.dst_addr = dst,
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.size = size,
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.next = desc_iova,
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};
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/* Tell the device the address of the descriptor. */
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writeq(desc_iova, registers + IOAT2_CHAINADDR_OFFSET);
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/* (Re)Enable the channel interrupt and abort on any errors */
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chanctrl = IOAT_CHANCTRL_INT_REARM | IOAT_CHANCTRL_ANY_ERR_ABORT_EN;
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writew(chanctrl, registers + IOAT_CHANCTRL_OFFSET);
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/* Kick off @count DMA copy operation(s). */
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writew(count, registers + IOAT_CHAN_DMACOUNT_OFFSET);
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}
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static void ioat_memcpy_start(struct vfio_pci_device *device,
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iova_t src, iova_t dst, u64 size,
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u64 count)
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{
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__ioat_memcpy_start(device, src, dst, size, count, false);
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}
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static void ioat_send_msi(struct vfio_pci_device *device)
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{
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struct ioat_state *ioat = to_ioat_state(device);
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__ioat_memcpy_start(device,
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to_iova(device, &ioat->send_msi_src),
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to_iova(device, &ioat->send_msi_dst),
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sizeof(ioat->send_msi_src), 1, true);
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VFIO_ASSERT_EQ(ioat_memcpy_wait(device), 0);
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}
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const struct vfio_pci_driver_ops ioat_ops = {
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.name = "ioat",
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.probe = ioat_probe,
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.init = ioat_init,
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.remove = ioat_remove,
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.memcpy_start = ioat_memcpy_start,
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.memcpy_wait = ioat_memcpy_wait,
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.send_msi = ioat_send_msi,
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};
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1
tools/testing/selftests/vfio/lib/drivers/ioat/registers.h
Symbolic link
1
tools/testing/selftests/vfio/lib/drivers/ioat/registers.h
Symbolic link
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../../../../../../../drivers/dma/ioat/registers.h
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include $(top_srcdir)/scripts/subarch.include
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ARCH ?= $(SUBARCH)
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VFIO_DIR := $(selfdir)/vfio
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LIBVFIO_C := lib/vfio_pci_device.c
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LIBVFIO_C += lib/vfio_pci_driver.c
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ifeq ($(ARCH:x86_64=x86),x86)
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LIBVFIO_C += lib/drivers/ioat/ioat.c
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endif
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LIBVFIO_O := $(patsubst %.c, $(OUTPUT)/%.o, $(LIBVFIO_C))
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LIBVFIO_O_DIRS := $(shell dirname $(LIBVFIO_O) | uniq)
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@ -4,7 +4,15 @@
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#include "../../../kselftest.h"
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#include <vfio_util.h>
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static struct vfio_pci_driver_ops *driver_ops[] = {};
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#ifdef __x86_64__
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extern struct vfio_pci_driver_ops ioat_ops;
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#endif
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static struct vfio_pci_driver_ops *driver_ops[] = {
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#ifdef __x86_64__
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&ioat_ops,
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#endif
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};
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void vfio_pci_driver_probe(struct vfio_pci_device *device)
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{
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