github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-07-31 03:27:03 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

Merge "soc: qcom: eud: Force conversion to u32"

Browse Source
This commit is contained in:
qctecmdr 2022-10-04 09:40:44 -07:00 committed by Gerrit - the friendly Code Review server
commit 21f3a2eb36
4 changed files with 9 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
drivers/interconnect/qcom/icc-common.c
View File

@ -5,6 +5,7 @@
#include <linux/of.h>
#include <linux/slab.h>
#include <linux/module.h>
#include "icc-common.h"
@ -32,3 +33,5 @@ struct icc_node_data *qcom_icc_xlate_extended(struct of_phandle_args *spec, void
return ndata;
}
EXPORT_SYMBOL_GPL(qcom_icc_xlate_extended);
MODULE_LICENSE("GPL");

8
drivers/soc/qcom/eud.c
View File

@ -394,7 +394,7 @@ static void eud_set_termios(struct uart_port *port, struct ktermios *new,
static void eud_stop_tx(struct uart_port *port)
{
/* Disable Tx interrupt */
writel_relaxed(~EUD_INT_TX, port->membase + EUD_REG_INT_STATUS_1);
writel_relaxed((__force u32)~EUD_INT_TX, port->membase + EUD_REG_INT_STATUS_1);
/* Ensure Register Writes Complete */
wmb();
}
@ -410,7 +410,7 @@ static void eud_start_tx(struct uart_port *port)
static void eud_stop_rx(struct uart_port *port)
{
/* Disable Rx interrupt */
writel_relaxed(~EUD_INT_RX, port->membase + EUD_REG_INT_STATUS_1);
writel_relaxed((__force u32)~EUD_INT_RX, port->membase + EUD_REG_INT_STATUS_1);
/* Ensure Register Writes Complete */
wmb();
}
@ -427,7 +427,7 @@ static int eud_startup(struct uart_port *port)
static void eud_shutdown(struct uart_port *port)
{
/* Disable both Tx & Rx interrupts */
writel_relaxed(~EUD_INT_TX | ~EUD_INT_RX,
writel_relaxed((__force u32)(~EUD_INT_TX | ~EUD_INT_RX),
port->membase + EUD_REG_INT_STATUS_1);
/* Ensure Register Writes Complete */
wmb();
@ -453,7 +453,7 @@ static void eud_config_port(struct uart_port *port, int flags)
{
/* set port type, clear Tx and Rx interrupts */
port->type = PORT_EUD_UART;
writel_relaxed(~EUD_INT_TX | ~EUD_INT_RX,
writel_relaxed((__force u32)(~EUD_INT_TX | ~EUD_INT_RX),
port->membase + EUD_REG_INT_STATUS_1);
/* Ensure Register Writes Complete */
wmb();

1
modules.list.msm.kalama
View File

@ -12,6 +12,7 @@ proxy-consumer.ko
rpmh-regulator.ko
qcom_dma_heaps.ko
qcom_hwspinlock.ko
interconnect_qcom.ko
clk-dummy.ko
clk-qcom.ko
cmd-db.ko

1
modules.list.msm.pineapple
View File

@ -41,6 +41,7 @@ debug-regulator.ko
phy-qcom-ufs.ko
phy-qcom-ufs-qrbtc-sdm845.ko
ufs_qcom.ko
interconnect_qcom.ko
icc-bcm-voter.ko
icc-rpmh.ko
qnoc-qos.ko