From 21f18e9e49a83d88287ffc8e4b3acc663b05ef29 Mon Sep 17 00:00:00 2001 From: Taniya Das Date: Fri, 14 Dec 2018 12:36:24 +0530 Subject: [PATCH] clk: qcom: rcg2: Add support for hardware control mode Add a flag to indicate to support and enable hardware control mode of an RCG. Change-Id: I21194a463441ea13b7575a4174b1f96504b42b1e Signed-off-by: Taniya Das --- drivers/clk/qcom/clk-rcg.h | 1 + drivers/clk/qcom/clk-rcg2.c | 3 +++ 2 files changed, 4 insertions(+) diff --git a/drivers/clk/qcom/clk-rcg.h b/drivers/clk/qcom/clk-rcg.h index fc976ef6a893..5426927865ee 100644 --- a/drivers/clk/qcom/clk-rcg.h +++ b/drivers/clk/qcom/clk-rcg.h @@ -158,6 +158,7 @@ struct clk_rcg2 { u8 cfg_off; u8 flags; #define FORCE_ENABLE_RCG BIT(0) +#define HW_CLK_CTRL_MODE BIT(1) }; #define to_clk_rcg2(_hw) container_of(to_clk_regmap(_hw), struct clk_rcg2, clkr) diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c index a77b9712417b..a6aeb4434ae9 100644 --- a/drivers/clk/qcom/clk-rcg2.c +++ b/drivers/clk/qcom/clk-rcg2.c @@ -419,6 +419,9 @@ static int __clk_rcg2_configure(struct clk_rcg2 *rcg, const struct freq_tbl *f) cfg |= rcg->parent_map[index].cfg << CFG_SRC_SEL_SHIFT; if (rcg->mnd_width && f->n && (f->m != f->n)) cfg |= CFG_MODE_DUAL_EDGE; + if (rcg->flags & HW_CLK_CTRL_MODE) + cfg |= CFG_HW_CLK_CTRL_MASK; + return regmap_update_bits(rcg->clkr.regmap, RCG_CFG_OFFSET(rcg), mask, cfg); }