arm64: dts: lx2162a: transition to device-specific SerDes compatible strings

Align to the modern fsl,lynx-28g.yaml binding for the LX2162A SoC, where
the SoC and SerDes instance is present in the compatible string, to
allow reliable per-lane capability detection and per-lane customization
of electrical properties.

Since one of the major differences between LX2162A and LX2160A is the
SerDes, add the necessary nodes to its own fsl-lx2162a-serdes.dtsi file.

Also mark the serdes_1 node as disabled by default since any dts using
it enables it explicitly now.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
This commit is contained in:
Ioana Ciornei 2026-07-17 15:06:31 +03:00 committed by Frank Li
parent bc12e3ee01
commit 21cb12ad02

View File

@ -7,15 +7,80 @@
&soc {
serdes_1: phy@1ea0000 {
compatible = "fsl,lynx-28g";
compatible = "fsl,lx2162a-serdes1", "fsl,lynx-28g";
reg = <0x0 0x1ea0000 0x0 0x1e30>;
#address-cells = <1>;
#size-cells = <0>;
#phy-cells = <1>;
status = "disabled";
serdes_1_lane_e: phy@4 {
reg = <4>;
#phy-cells = <0>;
};
serdes_1_lane_f: phy@5 {
reg = <5>;
#phy-cells = <0>;
};
serdes_1_lane_g: phy@6 {
reg = <6>;
#phy-cells = <0>;
};
serdes_1_lane_h: phy@7 {
reg = <7>;
#phy-cells = <0>;
};
};
serdes_2: phy@1eb0000 {
compatible = "fsl,lynx-28g";
compatible = "fsl,lx2162a-serdes2", "fsl,lynx-28g";
reg = <0x0 0x1eb0000 0x0 0x1e30>;
#address-cells = <1>;
#size-cells = <0>;
#phy-cells = <1>;
status = "disabled";
serdes_2_lane_a: phy@0 {
reg = <0>;
#phy-cells = <0>;
};
serdes_2_lane_b: phy@1 {
reg = <1>;
#phy-cells = <0>;
};
serdes_2_lane_c: phy@2 {
reg = <2>;
#phy-cells = <0>;
};
serdes_2_lane_d: phy@3 {
reg = <3>;
#phy-cells = <0>;
};
serdes_2_lane_e: phy@4 {
reg = <4>;
#phy-cells = <0>;
};
serdes_2_lane_f: phy@5 {
reg = <5>;
#phy-cells = <0>;
};
serdes_2_lane_g: phy@6 {
reg = <6>;
#phy-cells = <0>;
};
serdes_2_lane_h: phy@7 {
reg = <7>;
#phy-cells = <0>;
};
};
};