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arm64: dts: lx2162a: transition to device-specific SerDes compatible strings
Align to the modern fsl,lynx-28g.yaml binding for the LX2162A SoC, where the SoC and SerDes instance is present in the compatible string, to allow reliable per-lane capability detection and per-lane customization of electrical properties. Since one of the major differences between LX2162A and LX2160A is the SerDes, add the necessary nodes to its own fsl-lx2162a-serdes.dtsi file. Also mark the serdes_1 node as disabled by default since any dts using it enables it explicitly now. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
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@ -7,15 +7,80 @@
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&soc {
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serdes_1: phy@1ea0000 {
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compatible = "fsl,lynx-28g";
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compatible = "fsl,lx2162a-serdes1", "fsl,lynx-28g";
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reg = <0x0 0x1ea0000 0x0 0x1e30>;
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#address-cells = <1>;
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#size-cells = <0>;
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#phy-cells = <1>;
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status = "disabled";
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serdes_1_lane_e: phy@4 {
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reg = <4>;
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#phy-cells = <0>;
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};
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serdes_1_lane_f: phy@5 {
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reg = <5>;
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#phy-cells = <0>;
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};
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serdes_1_lane_g: phy@6 {
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reg = <6>;
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#phy-cells = <0>;
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};
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serdes_1_lane_h: phy@7 {
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reg = <7>;
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#phy-cells = <0>;
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};
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};
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serdes_2: phy@1eb0000 {
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compatible = "fsl,lynx-28g";
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compatible = "fsl,lx2162a-serdes2", "fsl,lynx-28g";
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reg = <0x0 0x1eb0000 0x0 0x1e30>;
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#address-cells = <1>;
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#size-cells = <0>;
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#phy-cells = <1>;
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status = "disabled";
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serdes_2_lane_a: phy@0 {
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reg = <0>;
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#phy-cells = <0>;
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};
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serdes_2_lane_b: phy@1 {
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reg = <1>;
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#phy-cells = <0>;
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};
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serdes_2_lane_c: phy@2 {
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reg = <2>;
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#phy-cells = <0>;
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};
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serdes_2_lane_d: phy@3 {
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reg = <3>;
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#phy-cells = <0>;
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};
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serdes_2_lane_e: phy@4 {
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reg = <4>;
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#phy-cells = <0>;
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};
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serdes_2_lane_f: phy@5 {
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reg = <5>;
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#phy-cells = <0>;
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};
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serdes_2_lane_g: phy@6 {
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reg = <6>;
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#phy-cells = <0>;
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};
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serdes_2_lane_h: phy@7 {
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reg = <7>;
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#phy-cells = <0>;
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};
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};
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};
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