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soc: rockchip: fiq debugger: clear busy interrupt before ATF fiq init

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If uart has busy interrupt before ATF fiq init, although IER is 0,
it would cause interrupt. Thus after enable uart fiq of gic during init,
it may cause infinite interrupt because there is no uart handler to clear
the interrupts.

Change-Id: If530d266068e25132206519e5bf41762f6a7c9bd
Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
This commit is contained in:
Huibin Hong 2018-02-07 09:55:20 +08:00
parent 50dc19e1d9
commit 21ac5604d3
1 changed files with 2 additions and 0 deletions
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2
drivers/soc/rockchip/rk_fiq_debugger.c
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@ -466,6 +466,8 @@ void rk_serial_debug_init(void __iomem *base, phys_addr_t phy_base,
goto out3;
}
/* clear busy interrupt, make sure all interrupts are disabled */
rk_fiq_read(t, UART_USR);
#ifdef CONFIG_FIQ_DEBUGGER_TRUST_ZONE
if ((signal_irq > 0) && (serial_hwirq > 0)) {
ret = fiq_debugger_bind_sip_smc(t, phy_base, serial_hwirq,