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drm/amdkfd: use amdgpu ring types for MES queue
The MES interface takes queue types as enum amdgpu_ring_type values. The MES backend is responsible for converting those values to firmware-facing MES_QUEUE_TYPE values when building MES packets. The KFD queue manager was converting KFD queue types directly to MES_QUEUE_TYPE values before filling the MES input structures. That is the wrong abstraction level for the generic MES interface. Change the KFD helper to return AMDGPU_RING_TYPE_* values and rename it to make the expected type explicit. Use the helper for the add, remove, and reset MES paths. Signed-off-by: Geoffrey McRae <geoffrey.mcrae@amd.com> Reviewed-by: Sunil Khatri <sunil.khatri@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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89db46e455
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20f7f9b6fb
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@ -37,7 +37,8 @@
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#include "amdgpu_amdkfd.h"
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#include "amdgpu_reset.h"
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#include "amdgpu_sdma.h"
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#include "mes_v11_api_def.h"
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#include "amdgpu_ring.h"
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#include "amdgpu_mes.h"
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#include "kfd_debug.h"
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/* Size of the per-pipe EOP queue */
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@ -183,24 +184,24 @@ static void kfd_hws_hang(struct device_queue_manager *dqm)
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amdgpu_amdkfd_gpu_reset(dqm->dev->adev);
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}
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static int convert_to_mes_queue_type(int queue_type)
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static int convert_to_amdgpu_ring_type(int queue_type)
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{
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int mes_queue_type;
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int amdgpu_ring_type;
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switch (queue_type) {
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case KFD_QUEUE_TYPE_COMPUTE:
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mes_queue_type = MES_QUEUE_TYPE_COMPUTE;
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amdgpu_ring_type = AMDGPU_RING_TYPE_COMPUTE;
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break;
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case KFD_QUEUE_TYPE_SDMA:
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mes_queue_type = MES_QUEUE_TYPE_SDMA;
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amdgpu_ring_type = AMDGPU_RING_TYPE_SDMA;
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break;
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default:
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WARN(1, "Invalid queue type %d", queue_type);
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mes_queue_type = -EINVAL;
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amdgpu_ring_type = -EINVAL;
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break;
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}
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return mes_queue_type;
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return amdgpu_ring_type;
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}
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static int add_queue_mes(struct device_queue_manager *dqm, struct queue *q,
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@ -250,7 +251,7 @@ static int add_queue_mes(struct device_queue_manager *dqm, struct queue *q,
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(qpd->pqm->process->debug_trap_enabled ||
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kfd_dbg_has_ttmps_always_setup(q->device));
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queue_type = convert_to_mes_queue_type(q->properties.type);
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queue_type = convert_to_amdgpu_ring_type(q->properties.type);
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if (queue_type < 0) {
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dev_err(adev->dev, "Queue type not supported with MES, queue:%d\n",
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q->properties.type);
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@ -299,7 +300,7 @@ static int remove_queue_mes_on_reset_option(struct device_queue_manager *dqm, st
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memset(&queue_input, 0x0, sizeof(struct mes_remove_queue_input));
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queue_input.doorbell_offset = q->properties.doorbell_off;
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queue_input.gang_context_addr = q->gang_ctx_gpu_addr;
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queue_input.queue_type = convert_to_mes_queue_type(q->properties.type);
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queue_input.queue_type = convert_to_amdgpu_ring_type(q->properties.type);
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queue_input.remove_queue_after_reset = flush_mes_queue;
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queue_input.xcc_id = ffs(dqm->dev->xcc_mask) - 1;
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@ -468,7 +469,7 @@ static int reset_queues_mes(struct device_queue_manager *dqm, struct queue *q)
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memset(&queue_input, 0x0, sizeof(struct mes_remove_queue_input));
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queue_input.doorbell_offset = q->properties.doorbell_off;
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queue_input.gang_context_addr = q->gang_ctx_gpu_addr;
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queue_input.queue_type = convert_to_mes_queue_type(q->properties.type);
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queue_input.queue_type = convert_to_amdgpu_ring_type(q->properties.type);
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queue_input.remove_queue_after_reset = false;
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queue_input.xcc_id = ffs(dqm->dev->xcc_mask) - 1;
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/* pass the known bad queue info to the reset function */
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