From 20253c44c72785ad6d90d6fdc78c96e56a69f4b1 Mon Sep 17 00:00:00 2001 From: Cosmin Tanislav Date: Sun, 13 Sep 2026 22:56:53 +0300 Subject: [PATCH] pinctrl: renesas: rzt2h: Reuse helpers The PMCm peripheral-mode test, the PINm input read, the PMm write, and the PMm read are open-coded in several places. Reuse the already existing helpers. Reviewed-by: Geert Uytterhoeven Signed-off-by: Cosmin Tanislav Link: https://patch.msgid.link/20260913195654.3371385-5-cosmin-gabriel.tanislav.xa@renesas.com Signed-off-by: Geert Uytterhoeven --- drivers/pinctrl/renesas/pinctrl-rzt2h.c | 34 +++++++++---------------- 1 file changed, 12 insertions(+), 22 deletions(-) diff --git a/drivers/pinctrl/renesas/pinctrl-rzt2h.c b/drivers/pinctrl/renesas/pinctrl-rzt2h.c index 9d7e4cba85c9..80a581fdef37 100644 --- a/drivers/pinctrl/renesas/pinctrl-rzt2h.c +++ b/drivers/pinctrl/renesas/pinctrl-rzt2h.c @@ -223,7 +223,7 @@ static void rzt2h_pinctrl_set_pfc_mode(struct rzt2h_pinctrl *pctrl, reg64 = rzt2h_pinctrl_readq(pctrl, port, PFC(port)); /* Check if pin is already configured to the desired function */ - if ((rzt2h_pinctrl_readb(pctrl, port, PMC(port)) & BIT(pin)) && + if (rzt2h_pin_mode_is_peripheral(pctrl, port, pin) && field_get(PFC_PIN_MASK(pin), reg64) == func) return; @@ -777,15 +777,7 @@ static int rzt2h_gpio_request(struct gpio_chip *chip, unsigned int offset) static void rzt2h_gpio_set_direction(struct rzt2h_pinctrl *pctrl, u32 port, u8 bit, bool output) { - u16 reg; - - guard(raw_spinlock_irqsave)(&pctrl->lock); - - reg = rzt2h_pinctrl_readw(pctrl, port, PM(port)); - reg &= ~PM_PIN_MASK(bit); - - reg |= (output ? PM_OUTPUT : PM_INPUT) << (bit * 2); - rzt2h_pinctrl_writew(pctrl, port, reg, PM(port)); + rzt2h_pin_write_pm(pctrl, port, bit, output ? PM_OUTPUT : PM_INPUT); } static int rzt2h_gpio_get_direction(struct gpio_chip *chip, unsigned int offset) @@ -794,8 +786,8 @@ static int rzt2h_gpio_get_direction(struct gpio_chip *chip, unsigned int offset) u8 port = RZT2H_PIN_ID_TO_PORT(offset); u8 bit = RZT2H_PIN_ID_TO_PIN(offset); u64 reg64; - u16 reg; int ret; + u8 pm; ret = rzt2h_validate_pin(pctrl, offset); if (ret) @@ -803,7 +795,7 @@ static int rzt2h_gpio_get_direction(struct gpio_chip *chip, unsigned int offset) guard(raw_spinlock_irqsave)(&pctrl->lock); - if (rzt2h_pinctrl_readb(pctrl, port, PMC(port)) & BIT(bit)) { + if (rzt2h_pin_mode_is_peripheral(pctrl, port, bit)) { /* * When a GPIO is being requested as an IRQ, the pinctrl * framework expects to be able to read the GPIO's direction. @@ -821,11 +813,10 @@ static int rzt2h_gpio_get_direction(struct gpio_chip *chip, unsigned int offset) return -EINVAL; } - reg = rzt2h_pinctrl_readw(pctrl, port, PM(port)); - reg = (reg >> (bit * 2)) & PM_MASK; - if (reg & PM_OUTPUT) + pm = rzt2h_pin_read_pm(pctrl, port, bit); + if (pm & PM_OUTPUT) return GPIO_LINE_DIRECTION_OUT; - if (reg & PM_INPUT) + if (pm & PM_INPUT) return GPIO_LINE_DIRECTION_IN; return -EINVAL; @@ -855,16 +846,15 @@ static int rzt2h_gpio_get(struct gpio_chip *chip, unsigned int offset) struct rzt2h_pinctrl *pctrl = gpiochip_get_data(chip); u8 port = RZT2H_PIN_ID_TO_PORT(offset); u8 bit = RZT2H_PIN_ID_TO_PIN(offset); - u16 reg; + u8 pm; if (rzt2h_pin_mode_is_peripheral(pctrl, port, bit)) return rzt2h_pin_read_input(pctrl, port, bit); - reg = rzt2h_pinctrl_readw(pctrl, port, PM(port)); - reg = (reg >> (bit * 2)) & PM_MASK; - if (reg & PM_INPUT) - return !!(rzt2h_pinctrl_readb(pctrl, port, PIN(port)) & BIT(bit)); - if (reg & PM_OUTPUT) + pm = rzt2h_pin_read_pm(pctrl, port, bit); + if (pm & PM_INPUT) + return rzt2h_pin_read_input(pctrl, port, bit); + if (pm & PM_OUTPUT) return !!(rzt2h_pinctrl_readb(pctrl, port, P(port)) & BIT(bit)); return -EINVAL;