dt-bindings: rtc: renesas,rzn1-rtc: Add RZ/T2H and RZ/N2H support

Add compatible strings for the RTC block found on the Renesas RZ/T2H
(R9A09G077) and RZ/N2H (R9A09G087) SoCs.

These SoCs integrate a closely related variant of the RZ/N1 RTC IP.
Unlike RZ/N1, they do not implement the RTCA0SUBU register. This is
not a limitation for Linux support, as these registers are not used
when the RTC operates in "scmp" clock mode, which is required on
RZ/T2H and RZ/N2H due to their 195.3 kHz input clock.

The RZ/T2H RTC variant also supports a 1Hz output signal on the
RTCAT1HZ pin, controlled by the RTCA0CTL1[RTCA01HZE] bit. This bit is
marked as reserved in the RZ/N1 hardware manual.

Update the binding schema to require the additional clock inputs used by
these SoCs.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://patch.msgid.link/20260821211032.13554-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
This commit is contained in:
Lad Prabhakar 2026-08-21 22:10:16 +01:00 committed by Alexandre Belloni
parent 78acddfde7
commit 1ffb5be3e4

View File

@ -9,15 +9,19 @@ title: Renesas RZ/N1 SoCs Real-Time Clock
maintainers:
- Miquel Raynal <miquel.raynal@bootlin.com>
allOf:
- $ref: rtc.yaml#
properties:
compatible:
items:
- enum:
- renesas,r9a06g032-rtc
- const: renesas,rzn1-rtc
oneOf:
- items:
- enum:
- renesas,r9a06g032-rtc
- const: renesas,rzn1-rtc
- const: renesas,r9a09g077-rtc
- items:
- const: renesas,r9a09g087-rtc
- const: renesas,r9a09g077-rtc
reg:
maxItems: 1
@ -54,6 +58,23 @@ required:
- clock-names
- power-domains
allOf:
- $ref: rtc.yaml#
- if:
properties:
compatible:
contains:
enum:
- renesas,r9a09g077-rtc
- renesas,r9a09g087-rtc
then:
properties:
clocks:
minItems: 2
clock-names:
minItems: 2
unevaluatedProperties: false
examples: