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Merge branch 'mvpp2-phylink'
Russell King says: ==================== Convert mvpp2 to phylink supported_interfaces This patch series converts mvpp2 to use phylinks supported_interfaces bitmap to simplify the validate() implementation. The patches: 1) Add the supported interface modes the supported_interfaces bitmap. 2) Removes the checks for the interface type being supported from the validate callback 3) Removes the now unnecessary checks and call to phylink_helper_basex_speed() to support switching between 1000base-X and 2500base-X for SFPs 4) Cleans up the resulting validate() code. (3) becomes possible because when asking the MAC for its complete support, we walk all supported interfaces which will include 1000base-X and 2500base-X only if the comphy is present. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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commit
1feef2dece
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@ -6261,32 +6261,13 @@ static void mvpp2_phylink_validate(struct phylink_config *config,
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struct mvpp2_port *port = mvpp2_phylink_to_port(config);
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__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
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/* Invalid combinations */
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switch (state->interface) {
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case PHY_INTERFACE_MODE_10GBASER:
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case PHY_INTERFACE_MODE_XAUI:
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if (!mvpp2_port_supports_xlg(port))
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goto empty_set;
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break;
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case PHY_INTERFACE_MODE_RGMII:
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case PHY_INTERFACE_MODE_RGMII_ID:
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case PHY_INTERFACE_MODE_RGMII_RXID:
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case PHY_INTERFACE_MODE_RGMII_TXID:
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if (!mvpp2_port_supports_rgmii(port))
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goto empty_set;
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break;
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case PHY_INTERFACE_MODE_1000BASEX:
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case PHY_INTERFACE_MODE_2500BASEX:
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/* When in 802.3z mode, we must have AN enabled:
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* Bit 2 Field InBandAnEn In-band Auto-Negotiation enable. ...
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* When <PortType> = 1 (1000BASE-X) this field must be set to 1.
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*/
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if (!phylink_test(state->advertising, Autoneg))
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goto empty_set;
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break;
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default:
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break;
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}
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/* When in 802.3z mode, we must have AN enabled:
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* Bit 2 Field InBandAnEn In-band Auto-Negotiation enable. ...
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* When <PortType> = 1 (1000BASE-X) this field must be set to 1.
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*/
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if (phy_interface_mode_is_8023z(state->interface) &&
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!phylink_test(state->advertising, Autoneg))
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goto empty_set;
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phylink_set(mask, Autoneg);
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phylink_set_port_modes(mask);
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@ -6299,14 +6280,12 @@ static void mvpp2_phylink_validate(struct phylink_config *config,
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switch (state->interface) {
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case PHY_INTERFACE_MODE_10GBASER:
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case PHY_INTERFACE_MODE_XAUI:
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case PHY_INTERFACE_MODE_NA:
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if (mvpp2_port_supports_xlg(port)) {
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phylink_set_10g_modes(mask);
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phylink_set(mask, 10000baseKR_Full);
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}
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if (state->interface != PHY_INTERFACE_MODE_NA)
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break;
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fallthrough;
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break;
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case PHY_INTERFACE_MODE_RGMII:
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case PHY_INTERFACE_MODE_RGMII_ID:
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case PHY_INTERFACE_MODE_RGMII_RXID:
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@ -6318,30 +6297,24 @@ static void mvpp2_phylink_validate(struct phylink_config *config,
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phylink_set(mask, 100baseT_Full);
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phylink_set(mask, 1000baseT_Full);
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phylink_set(mask, 1000baseX_Full);
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if (state->interface != PHY_INTERFACE_MODE_NA)
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break;
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fallthrough;
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case PHY_INTERFACE_MODE_1000BASEX:
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case PHY_INTERFACE_MODE_2500BASEX:
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if (port->comphy ||
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state->interface != PHY_INTERFACE_MODE_2500BASEX) {
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phylink_set(mask, 1000baseT_Full);
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phylink_set(mask, 1000baseX_Full);
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}
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if (port->comphy ||
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state->interface == PHY_INTERFACE_MODE_2500BASEX) {
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phylink_set(mask, 2500baseT_Full);
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phylink_set(mask, 2500baseX_Full);
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}
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break;
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case PHY_INTERFACE_MODE_1000BASEX:
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phylink_set(mask, 1000baseT_Full);
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phylink_set(mask, 1000baseX_Full);
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break;
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case PHY_INTERFACE_MODE_2500BASEX:
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phylink_set(mask, 2500baseT_Full);
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phylink_set(mask, 2500baseX_Full);
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break;
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default:
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goto empty_set;
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}
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linkmode_and(supported, supported, mask);
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linkmode_and(state->advertising, state->advertising, mask);
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phylink_helper_basex_speed(state);
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return;
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empty_set:
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@ -6937,6 +6910,40 @@ static int mvpp2_port_probe(struct platform_device *pdev,
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port->phylink_config.dev = &dev->dev;
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port->phylink_config.type = PHYLINK_NETDEV;
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if (mvpp2_port_supports_xlg(port)) {
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__set_bit(PHY_INTERFACE_MODE_10GBASER,
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port->phylink_config.supported_interfaces);
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__set_bit(PHY_INTERFACE_MODE_XAUI,
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port->phylink_config.supported_interfaces);
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}
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if (mvpp2_port_supports_rgmii(port))
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phy_interface_set_rgmii(port->phylink_config.supported_interfaces);
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if (comphy) {
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/* If a COMPHY is present, we can support any of the
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* serdes modes and switch between them.
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*/
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__set_bit(PHY_INTERFACE_MODE_SGMII,
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port->phylink_config.supported_interfaces);
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__set_bit(PHY_INTERFACE_MODE_1000BASEX,
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port->phylink_config.supported_interfaces);
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__set_bit(PHY_INTERFACE_MODE_2500BASEX,
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port->phylink_config.supported_interfaces);
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} else if (phy_mode == PHY_INTERFACE_MODE_2500BASEX) {
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/* No COMPHY, with only 2500BASE-X mode supported */
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__set_bit(PHY_INTERFACE_MODE_2500BASEX,
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port->phylink_config.supported_interfaces);
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} else if (phy_mode == PHY_INTERFACE_MODE_1000BASEX ||
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phy_mode == PHY_INTERFACE_MODE_SGMII) {
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/* No COMPHY, we can switch between 1000BASE-X and SGMII
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*/
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__set_bit(PHY_INTERFACE_MODE_1000BASEX,
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port->phylink_config.supported_interfaces);
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__set_bit(PHY_INTERFACE_MODE_SGMII,
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port->phylink_config.supported_interfaces);
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}
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phylink = phylink_create(&port->phylink_config, port_fwnode,
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phy_mode, &mvpp2_phylink_ops);
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if (IS_ERR(phylink)) {
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