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iio: imu: inv_icm45600: add IMU IIO accelerometer device
Add IIO device for accelerometer sensor with data polling interface and FIFO parsing. Attributes: raw, scale, sampling_frequency, calibbias. Temperature is available as a processed channel. Signed-off-by: Remi Buisson <remi.buisson@tdk.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This commit is contained in:
Remi Buisson
Jonathan Cameron
parent
27e072bc34
commit
1fad7b491b
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@ -4,3 +4,4 @@ obj-$(CONFIG_INV_ICM45600) += inv-icm45600.o
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inv-icm45600-y += inv_icm45600_core.o
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inv-icm45600-y += inv_icm45600_buffer.o
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inv-icm45600-y += inv_icm45600_gyro.o
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inv-icm45600-y += inv_icm45600_accel.o
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@ -113,6 +113,8 @@ struct inv_icm45600_chip_info {
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u8 whoami;
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const char *name;
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const struct inv_icm45600_conf *conf;
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const int *accel_scales;
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const int accel_scales_len;
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const int *gyro_scales;
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const int gyro_scales_len;
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};
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@ -126,6 +128,8 @@ extern const struct inv_icm45600_chip_info inv_icm45687_chip_info;
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extern const struct inv_icm45600_chip_info inv_icm45688p_chip_info;
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extern const struct inv_icm45600_chip_info inv_icm45689_chip_info;
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extern const int inv_icm45600_accel_scale[][2];
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extern const int inv_icm45686_accel_scale[][2];
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extern const int inv_icm45600_gyro_scale[][2];
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extern const int inv_icm45686_gyro_scale[][2];
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@ -374,4 +378,8 @@ struct iio_dev *inv_icm45600_gyro_init(struct inv_icm45600_state *st);
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int inv_icm45600_gyro_parse_fifo(struct iio_dev *indio_dev);
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struct iio_dev *inv_icm45600_accel_init(struct inv_icm45600_state *st);
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int inv_icm45600_accel_parse_fifo(struct iio_dev *indio_dev);
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#endif
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782
drivers/iio/imu/inv_icm45600/inv_icm45600_accel.c
Normal file
782
drivers/iio/imu/inv_icm45600/inv_icm45600_accel.c
Normal file
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@ -0,0 +1,782 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (C) 2025 Invensense, Inc.
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*/
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/math64.h>
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#include <linux/mutex.h>
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#include <linux/pm_runtime.h>
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#include <linux/regmap.h>
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#include <linux/types.h>
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#include <linux/iio/buffer.h>
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#include <linux/iio/common/inv_sensors_timestamp.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/kfifo_buf.h>
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#include "inv_icm45600_buffer.h"
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#include "inv_icm45600.h"
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enum inv_icm45600_accel_scan {
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INV_ICM45600_ACCEL_SCAN_X,
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INV_ICM45600_ACCEL_SCAN_Y,
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INV_ICM45600_ACCEL_SCAN_Z,
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INV_ICM45600_ACCEL_SCAN_TEMP,
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INV_ICM45600_ACCEL_SCAN_TIMESTAMP,
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};
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static const struct iio_chan_spec_ext_info inv_icm45600_accel_ext_infos[] = {
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IIO_MOUNT_MATRIX(IIO_SHARED_BY_ALL, inv_icm45600_get_mount_matrix),
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{ }
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};
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#define INV_ICM45600_ACCEL_CHAN(_modifier, _index, _ext_info) \
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{ \
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.type = IIO_ACCEL, \
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.modified = 1, \
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.channel2 = _modifier, \
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.info_mask_separate = \
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BIT(IIO_CHAN_INFO_RAW) | \
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BIT(IIO_CHAN_INFO_CALIBBIAS), \
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.info_mask_shared_by_type = \
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BIT(IIO_CHAN_INFO_SCALE), \
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.info_mask_shared_by_type_available = \
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BIT(IIO_CHAN_INFO_SCALE) | \
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BIT(IIO_CHAN_INFO_CALIBBIAS), \
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.info_mask_shared_by_all = \
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BIT(IIO_CHAN_INFO_SAMP_FREQ), \
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.info_mask_shared_by_all_available = \
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BIT(IIO_CHAN_INFO_SAMP_FREQ), \
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.scan_index = _index, \
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.scan_type = { \
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.sign = 's', \
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.realbits = 16, \
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.storagebits = 16, \
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.endianness = IIO_LE, \
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}, \
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.ext_info = _ext_info, \
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}
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static const struct iio_chan_spec inv_icm45600_accel_channels[] = {
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INV_ICM45600_ACCEL_CHAN(IIO_MOD_X, INV_ICM45600_ACCEL_SCAN_X,
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inv_icm45600_accel_ext_infos),
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INV_ICM45600_ACCEL_CHAN(IIO_MOD_Y, INV_ICM45600_ACCEL_SCAN_Y,
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inv_icm45600_accel_ext_infos),
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INV_ICM45600_ACCEL_CHAN(IIO_MOD_Z, INV_ICM45600_ACCEL_SCAN_Z,
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inv_icm45600_accel_ext_infos),
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INV_ICM45600_TEMP_CHAN(INV_ICM45600_ACCEL_SCAN_TEMP),
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IIO_CHAN_SOFT_TIMESTAMP(INV_ICM45600_ACCEL_SCAN_TIMESTAMP),
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};
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/*
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* IIO buffer data: size must be a power of 2 and timestamp aligned
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* 16 bytes: 6 bytes acceleration, 2 bytes temperature, 8 bytes timestamp
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*/
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struct inv_icm45600_accel_buffer {
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struct inv_icm45600_fifo_sensor_data accel;
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s16 temp;
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aligned_s64 timestamp;
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};
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static const unsigned long inv_icm45600_accel_scan_masks[] = {
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/* 3-axis accel + temperature */
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BIT(INV_ICM45600_ACCEL_SCAN_X) |
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BIT(INV_ICM45600_ACCEL_SCAN_Y) |
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BIT(INV_ICM45600_ACCEL_SCAN_Z) |
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BIT(INV_ICM45600_ACCEL_SCAN_TEMP),
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0
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};
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/* enable accelerometer sensor and FIFO write */
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static int inv_icm45600_accel_update_scan_mode(struct iio_dev *indio_dev,
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const unsigned long *scan_mask)
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{
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struct inv_icm45600_state *st = iio_device_get_drvdata(indio_dev);
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struct inv_icm45600_sensor_state *accel_st = iio_priv(indio_dev);
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struct inv_icm45600_sensor_conf conf = INV_ICM45600_SENSOR_CONF_KEEP_VALUES;
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unsigned int fifo_en = 0;
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unsigned int sleep = 0;
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int ret;
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scoped_guard(mutex, &st->lock) {
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if (*scan_mask & BIT(INV_ICM45600_ACCEL_SCAN_TEMP))
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fifo_en |= INV_ICM45600_SENSOR_TEMP;
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if (*scan_mask & (BIT(INV_ICM45600_ACCEL_SCAN_X) |
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BIT(INV_ICM45600_ACCEL_SCAN_Y) |
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BIT(INV_ICM45600_ACCEL_SCAN_Z))) {
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/* enable accel sensor */
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conf.mode = accel_st->power_mode;
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ret = inv_icm45600_set_accel_conf(st, &conf, &sleep);
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if (ret)
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return ret;
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fifo_en |= INV_ICM45600_SENSOR_ACCEL;
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}
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/* Update data FIFO write. */
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ret = inv_icm45600_buffer_set_fifo_en(st, fifo_en | st->fifo.en);
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}
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/* Sleep required time. */
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if (sleep)
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msleep(sleep);
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return ret;
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}
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static int _inv_icm45600_accel_read_sensor(struct inv_icm45600_state *st,
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struct inv_icm45600_sensor_state *accel_st,
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unsigned int reg, int *val)
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{
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struct inv_icm45600_sensor_conf conf = INV_ICM45600_SENSOR_CONF_KEEP_VALUES;
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int ret;
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/* enable accel sensor */
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conf.mode = accel_st->power_mode;
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ret = inv_icm45600_set_accel_conf(st, &conf, NULL);
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if (ret)
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return ret;
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/* read accel register data */
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ret = regmap_bulk_read(st->map, reg, &st->buffer.u16, sizeof(st->buffer.u16));
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if (ret)
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return ret;
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*val = sign_extend32(le16_to_cpup(&st->buffer.u16), 15);
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if (*val == INV_ICM45600_DATA_INVALID)
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return -ENODATA;
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return 0;
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}
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static int inv_icm45600_accel_read_sensor(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val)
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{
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struct inv_icm45600_state *st = iio_device_get_drvdata(indio_dev);
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struct inv_icm45600_sensor_state *accel_st = iio_priv(indio_dev);
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struct device *dev = regmap_get_device(st->map);
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unsigned int reg;
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int ret;
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if (chan->type != IIO_ACCEL)
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return -EINVAL;
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switch (chan->channel2) {
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case IIO_MOD_X:
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reg = INV_ICM45600_REG_ACCEL_DATA_X;
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break;
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case IIO_MOD_Y:
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reg = INV_ICM45600_REG_ACCEL_DATA_Y;
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break;
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case IIO_MOD_Z:
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reg = INV_ICM45600_REG_ACCEL_DATA_Z;
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break;
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default:
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return -EINVAL;
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}
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ret = pm_runtime_resume_and_get(dev);
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if (ret)
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return ret;
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scoped_guard(mutex, &st->lock)
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ret = _inv_icm45600_accel_read_sensor(st, accel_st, reg, val);
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pm_runtime_put_autosuspend(dev);
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return ret;
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}
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/* IIO format int + nano */
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const int inv_icm45600_accel_scale[][2] = {
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/* +/- 16G => 0.004788403 m/s-2 */
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[INV_ICM45600_ACCEL_FS_16G] = { 0, 4788403 },
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/* +/- 8G => 0.002394202 m/s-2 */
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[INV_ICM45600_ACCEL_FS_8G] = { 0, 2394202 },
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/* +/- 4G => 0.001197101 m/s-2 */
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[INV_ICM45600_ACCEL_FS_4G] = { 0, 1197101 },
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/* +/- 2G => 0.000598550 m/s-2 */
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[INV_ICM45600_ACCEL_FS_2G] = { 0, 598550 },
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};
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const int inv_icm45686_accel_scale[][2] = {
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/* +/- 32G => 0.009576806 m/s-2 */
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[INV_ICM45686_ACCEL_FS_32G] = { 0, 9576806 },
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/* +/- 16G => 0.004788403 m/s-2 */
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[INV_ICM45686_ACCEL_FS_16G] = { 0, 4788403 },
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/* +/- 8G => 0.002394202 m/s-2 */
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[INV_ICM45686_ACCEL_FS_8G] = { 0, 2394202 },
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/* +/- 4G => 0.001197101 m/s-2 */
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[INV_ICM45686_ACCEL_FS_4G] = { 0, 1197101 },
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/* +/- 2G => 0.000598550 m/s-2 */
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[INV_ICM45686_ACCEL_FS_2G] = { 0, 598550 },
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};
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static int inv_icm45600_accel_read_scale(struct iio_dev *indio_dev,
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int *val, int *val2)
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{
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struct inv_icm45600_state *st = iio_device_get_drvdata(indio_dev);
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struct inv_icm45600_sensor_state *accel_st = iio_priv(indio_dev);
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unsigned int idx;
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idx = st->conf.accel.fs;
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/* Full scale register starts at 1 for not High FSR parts */
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if (accel_st->scales == (const int *)&inv_icm45600_accel_scale)
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idx--;
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*val = accel_st->scales[2 * idx];
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*val2 = accel_st->scales[2 * idx + 1];
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return IIO_VAL_INT_PLUS_NANO;
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}
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static int inv_icm45600_accel_write_scale(struct iio_dev *indio_dev,
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int val, int val2)
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{
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struct inv_icm45600_state *st = iio_device_get_drvdata(indio_dev);
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struct inv_icm45600_sensor_state *accel_st = iio_priv(indio_dev);
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struct device *dev = regmap_get_device(st->map);
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unsigned int idx;
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struct inv_icm45600_sensor_conf conf = INV_ICM45600_SENSOR_CONF_KEEP_VALUES;
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int ret;
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for (idx = 0; idx < accel_st->scales_len; idx += 2) {
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if (val == accel_st->scales[idx] &&
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val2 == accel_st->scales[idx + 1])
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break;
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}
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if (idx == accel_st->scales_len)
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return -EINVAL;
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conf.fs = idx / 2;
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/* Full scale register starts at 1 for not High FSR parts */
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if (accel_st->scales == (const int *)&inv_icm45600_accel_scale)
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conf.fs++;
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ret = pm_runtime_resume_and_get(dev);
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if (ret)
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return ret;
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scoped_guard(mutex, &st->lock)
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ret = inv_icm45600_set_accel_conf(st, &conf, NULL);
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pm_runtime_put_autosuspend(dev);
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return ret;
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}
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/* IIO format int + micro */
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static const int inv_icm45600_accel_odr[] = {
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1, 562500, /* 1.5625Hz */
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3, 125000, /* 3.125Hz */
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6, 250000, /* 6.25Hz */
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12, 500000, /* 12.5Hz */
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25, 0, /* 25Hz */
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50, 0, /* 50Hz */
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100, 0, /* 100Hz */
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200, 0, /* 200Hz */
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400, 0, /* 400Hz */
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800, 0, /* 800Hz */
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1600, 0, /* 1.6kHz */
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3200, 0, /* 3.2kHz */
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6400, 0, /* 6.4kHz */
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};
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static const int inv_icm45600_accel_odr_conv[] = {
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INV_ICM45600_ODR_1_5625HZ_LP,
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INV_ICM45600_ODR_3_125HZ_LP,
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INV_ICM45600_ODR_6_25HZ_LP,
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INV_ICM45600_ODR_12_5HZ,
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INV_ICM45600_ODR_25HZ,
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INV_ICM45600_ODR_50HZ,
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INV_ICM45600_ODR_100HZ,
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INV_ICM45600_ODR_200HZ,
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INV_ICM45600_ODR_400HZ,
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INV_ICM45600_ODR_800HZ_LN,
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INV_ICM45600_ODR_1600HZ_LN,
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INV_ICM45600_ODR_3200HZ_LN,
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INV_ICM45600_ODR_6400HZ_LN,
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};
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static int inv_icm45600_accel_read_odr(struct inv_icm45600_state *st,
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int *val, int *val2)
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{
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unsigned int odr;
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unsigned int i;
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odr = st->conf.accel.odr;
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for (i = 0; i < ARRAY_SIZE(inv_icm45600_accel_odr_conv); ++i) {
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if (inv_icm45600_accel_odr_conv[i] == odr)
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break;
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}
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if (i >= ARRAY_SIZE(inv_icm45600_accel_odr_conv))
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return -EINVAL;
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*val = inv_icm45600_accel_odr[2 * i];
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*val2 = inv_icm45600_accel_odr[2 * i + 1];
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return IIO_VAL_INT_PLUS_MICRO;
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}
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static int _inv_icm45600_accel_write_odr(struct iio_dev *indio_dev, int odr)
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{
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struct inv_icm45600_state *st = iio_device_get_drvdata(indio_dev);
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struct inv_icm45600_sensor_state *accel_st = iio_priv(indio_dev);
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struct inv_sensors_timestamp *ts = &accel_st->ts;
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struct inv_icm45600_sensor_conf conf = INV_ICM45600_SENSOR_CONF_KEEP_VALUES;
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int ret;
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conf.odr = odr;
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ret = inv_sensors_timestamp_update_odr(ts, inv_icm45600_odr_to_period(conf.odr),
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iio_buffer_enabled(indio_dev));
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if (ret)
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return ret;
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if (st->conf.accel.mode != INV_ICM45600_SENSOR_MODE_OFF)
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conf.mode = accel_st->power_mode;
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ret = inv_icm45600_set_accel_conf(st, &conf, NULL);
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if (ret)
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return ret;
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inv_icm45600_buffer_update_fifo_period(st);
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inv_icm45600_buffer_update_watermark(st);
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return 0;
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}
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static int inv_icm45600_accel_write_odr(struct iio_dev *indio_dev,
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int val, int val2)
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{
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struct inv_icm45600_state *st = iio_device_get_drvdata(indio_dev);
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struct device *dev = regmap_get_device(st->map);
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unsigned int idx;
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int odr;
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int ret;
|
||||
|
||||
for (idx = 0; idx < ARRAY_SIZE(inv_icm45600_accel_odr); idx += 2) {
|
||||
if (val == inv_icm45600_accel_odr[idx] &&
|
||||
val2 == inv_icm45600_accel_odr[idx + 1])
|
||||
break;
|
||||
}
|
||||
if (idx >= ARRAY_SIZE(inv_icm45600_accel_odr))
|
||||
return -EINVAL;
|
||||
|
||||
odr = inv_icm45600_accel_odr_conv[idx / 2];
|
||||
|
||||
ret = pm_runtime_resume_and_get(dev);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
scoped_guard(mutex, &st->lock)
|
||||
ret = _inv_icm45600_accel_write_odr(indio_dev, odr);
|
||||
|
||||
pm_runtime_put_autosuspend(dev);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
* Calibration bias values, IIO range format int + micro.
|
||||
* Value is limited to +/-1g coded on 14 bits signed. Step is 0.125mg.
|
||||
*/
|
||||
static int inv_icm45600_accel_calibbias[] = {
|
||||
-9, 806650, /* min: -9.806650 m/s² */
|
||||
0, 1197, /* step: 0.001197 m/s² */
|
||||
9, 805453, /* max: 9.805453 m/s² */
|
||||
};
|
||||
|
||||
static int inv_icm45600_accel_read_offset(struct inv_icm45600_state *st,
|
||||
struct iio_chan_spec const *chan,
|
||||
int *val, int *val2)
|
||||
{
|
||||
struct device *dev = regmap_get_device(st->map);
|
||||
s64 val64;
|
||||
s32 bias;
|
||||
unsigned int reg;
|
||||
s16 offset;
|
||||
int ret;
|
||||
|
||||
if (chan->type != IIO_ACCEL)
|
||||
return -EINVAL;
|
||||
|
||||
switch (chan->channel2) {
|
||||
case IIO_MOD_X:
|
||||
reg = INV_ICM45600_IPREG_SYS2_REG_24;
|
||||
break;
|
||||
case IIO_MOD_Y:
|
||||
reg = INV_ICM45600_IPREG_SYS2_REG_32;
|
||||
break;
|
||||
case IIO_MOD_Z:
|
||||
reg = INV_ICM45600_IPREG_SYS2_REG_40;
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
ret = pm_runtime_resume_and_get(dev);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
scoped_guard(mutex, &st->lock)
|
||||
ret = regmap_bulk_read(st->map, reg, &st->buffer.u16, sizeof(st->buffer.u16));
|
||||
|
||||
pm_runtime_put_autosuspend(dev);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
offset = le16_to_cpup(&st->buffer.u16) & INV_ICM45600_ACCEL_OFFUSER_MASK;
|
||||
/* 14 bits signed value */
|
||||
offset = sign_extend32(offset, 13);
|
||||
|
||||
/*
|
||||
* convert raw offset to g then to m/s²
|
||||
* 14 bits signed raw step 1/8192g
|
||||
* g to m/s²: 9.806650
|
||||
* result in micro (* 1000000)
|
||||
* (offset * 9806650) / 8192
|
||||
*/
|
||||
val64 = (s64)offset * 9806650LL;
|
||||
/* for rounding, add + or - divisor (8192) divided by 2 */
|
||||
if (val64 >= 0)
|
||||
val64 += 8192LL / 2LL;
|
||||
else
|
||||
val64 -= 8192LL / 2LL;
|
||||
bias = div_s64(val64, 8192L);
|
||||
*val = bias / 1000000L;
|
||||
*val2 = bias % 1000000L;
|
||||
|
||||
return IIO_VAL_INT_PLUS_MICRO;
|
||||
}
|
||||
|
||||
static int inv_icm45600_accel_write_offset(struct inv_icm45600_state *st,
|
||||
struct iio_chan_spec const *chan,
|
||||
int val, int val2)
|
||||
{
|
||||
struct device *dev = regmap_get_device(st->map);
|
||||
s64 val64;
|
||||
s32 min, max;
|
||||
unsigned int reg;
|
||||
s16 offset;
|
||||
int ret;
|
||||
|
||||
if (chan->type != IIO_ACCEL)
|
||||
return -EINVAL;
|
||||
|
||||
switch (chan->channel2) {
|
||||
case IIO_MOD_X:
|
||||
reg = INV_ICM45600_IPREG_SYS2_REG_24;
|
||||
break;
|
||||
case IIO_MOD_Y:
|
||||
reg = INV_ICM45600_IPREG_SYS2_REG_32;
|
||||
break;
|
||||
case IIO_MOD_Z:
|
||||
reg = INV_ICM45600_IPREG_SYS2_REG_40;
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* inv_icm45600_accel_calibbias: min - step - max in micro */
|
||||
min = inv_icm45600_accel_calibbias[0] * 1000000L -
|
||||
inv_icm45600_accel_calibbias[1];
|
||||
max = inv_icm45600_accel_calibbias[4] * 1000000L +
|
||||
inv_icm45600_accel_calibbias[5];
|
||||
val64 = (s64)val * 1000000LL;
|
||||
if (val >= 0)
|
||||
val64 += (s64)val2;
|
||||
else
|
||||
val64 -= (s64)val2;
|
||||
if (val64 < min || val64 > max)
|
||||
return -EINVAL;
|
||||
|
||||
/*
|
||||
* convert m/s² to g then to raw value
|
||||
* m/s² to g: 1 / 9.806650
|
||||
* g to raw 14 bits signed, step 1/8192g: * 8192
|
||||
* val in micro (1000000)
|
||||
* val * 8192 / (9.806650 * 1000000)
|
||||
*/
|
||||
val64 = val64 * 8192LL;
|
||||
/* for rounding, add + or - divisor (9806650) divided by 2 */
|
||||
if (val64 >= 0)
|
||||
val64 += 9806650 / 2;
|
||||
else
|
||||
val64 -= 9806650 / 2;
|
||||
offset = div_s64(val64, 9806650);
|
||||
|
||||
/* clamp value limited to 14 bits signed */
|
||||
offset = clamp(offset, -8192, 8191);
|
||||
|
||||
st->buffer.u16 = cpu_to_le16(offset & INV_ICM45600_ACCEL_OFFUSER_MASK);
|
||||
|
||||
ret = pm_runtime_resume_and_get(dev);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
scoped_guard(mutex, &st->lock)
|
||||
ret = regmap_bulk_write(st->map, reg, &st->buffer.u16, sizeof(st->buffer.u16));
|
||||
|
||||
pm_runtime_put_autosuspend(dev);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int inv_icm45600_accel_read_raw(struct iio_dev *indio_dev,
|
||||
struct iio_chan_spec const *chan,
|
||||
int *val, int *val2, long mask)
|
||||
{
|
||||
struct inv_icm45600_state *st = iio_device_get_drvdata(indio_dev);
|
||||
int ret;
|
||||
|
||||
switch (chan->type) {
|
||||
case IIO_ACCEL:
|
||||
break;
|
||||
case IIO_TEMP:
|
||||
return inv_icm45600_temp_read_raw(indio_dev, chan, val, val2, mask);
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
switch (mask) {
|
||||
case IIO_CHAN_INFO_RAW:
|
||||
if (!iio_device_claim_direct(indio_dev))
|
||||
return -EBUSY;
|
||||
ret = inv_icm45600_accel_read_sensor(indio_dev, chan, val);
|
||||
iio_device_release_direct(indio_dev);
|
||||
if (ret)
|
||||
return ret;
|
||||
return IIO_VAL_INT;
|
||||
case IIO_CHAN_INFO_SCALE:
|
||||
return inv_icm45600_accel_read_scale(indio_dev, val, val2);
|
||||
case IIO_CHAN_INFO_SAMP_FREQ:
|
||||
return inv_icm45600_accel_read_odr(st, val, val2);
|
||||
case IIO_CHAN_INFO_CALIBBIAS:
|
||||
return inv_icm45600_accel_read_offset(st, chan, val, val2);
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
||||
static int inv_icm45600_accel_read_avail(struct iio_dev *indio_dev,
|
||||
struct iio_chan_spec const *chan,
|
||||
const int **vals,
|
||||
int *type, int *length, long mask)
|
||||
{
|
||||
struct inv_icm45600_sensor_state *accel_st = iio_priv(indio_dev);
|
||||
|
||||
if (chan->type != IIO_ACCEL)
|
||||
return -EINVAL;
|
||||
|
||||
switch (mask) {
|
||||
case IIO_CHAN_INFO_SCALE:
|
||||
*vals = accel_st->scales;
|
||||
*type = IIO_VAL_INT_PLUS_NANO;
|
||||
*length = accel_st->scales_len;
|
||||
return IIO_AVAIL_LIST;
|
||||
case IIO_CHAN_INFO_SAMP_FREQ:
|
||||
*vals = inv_icm45600_accel_odr;
|
||||
*type = IIO_VAL_INT_PLUS_MICRO;
|
||||
*length = ARRAY_SIZE(inv_icm45600_accel_odr);
|
||||
return IIO_AVAIL_LIST;
|
||||
case IIO_CHAN_INFO_CALIBBIAS:
|
||||
*vals = inv_icm45600_accel_calibbias;
|
||||
*type = IIO_VAL_INT_PLUS_MICRO;
|
||||
return IIO_AVAIL_RANGE;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
||||
static int inv_icm45600_accel_write_raw(struct iio_dev *indio_dev,
|
||||
struct iio_chan_spec const *chan,
|
||||
int val, int val2, long mask)
|
||||
{
|
||||
struct inv_icm45600_state *st = iio_device_get_drvdata(indio_dev);
|
||||
int ret;
|
||||
|
||||
if (chan->type != IIO_ACCEL)
|
||||
return -EINVAL;
|
||||
|
||||
switch (mask) {
|
||||
case IIO_CHAN_INFO_SCALE:
|
||||
if (!iio_device_claim_direct(indio_dev))
|
||||
return -EBUSY;
|
||||
ret = inv_icm45600_accel_write_scale(indio_dev, val, val2);
|
||||
iio_device_release_direct(indio_dev);
|
||||
return ret;
|
||||
case IIO_CHAN_INFO_SAMP_FREQ:
|
||||
return inv_icm45600_accel_write_odr(indio_dev, val, val2);
|
||||
case IIO_CHAN_INFO_CALIBBIAS:
|
||||
if (!iio_device_claim_direct(indio_dev))
|
||||
return -EBUSY;
|
||||
ret = inv_icm45600_accel_write_offset(st, chan, val, val2);
|
||||
iio_device_release_direct(indio_dev);
|
||||
return ret;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
||||
static int inv_icm45600_accel_write_raw_get_fmt(struct iio_dev *indio_dev,
|
||||
struct iio_chan_spec const *chan,
|
||||
long mask)
|
||||
{
|
||||
if (chan->type != IIO_ACCEL)
|
||||
return -EINVAL;
|
||||
|
||||
switch (mask) {
|
||||
case IIO_CHAN_INFO_SCALE:
|
||||
return IIO_VAL_INT_PLUS_NANO;
|
||||
case IIO_CHAN_INFO_SAMP_FREQ:
|
||||
return IIO_VAL_INT_PLUS_MICRO;
|
||||
case IIO_CHAN_INFO_CALIBBIAS:
|
||||
return IIO_VAL_INT_PLUS_MICRO;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
||||
static int inv_icm45600_accel_hwfifo_set_watermark(struct iio_dev *indio_dev,
|
||||
unsigned int val)
|
||||
{
|
||||
struct inv_icm45600_state *st = iio_device_get_drvdata(indio_dev);
|
||||
|
||||
guard(mutex)(&st->lock);
|
||||
|
||||
st->fifo.watermark.accel = val;
|
||||
return inv_icm45600_buffer_update_watermark(st);
|
||||
}
|
||||
|
||||
static int inv_icm45600_accel_hwfifo_flush(struct iio_dev *indio_dev,
|
||||
unsigned int count)
|
||||
{
|
||||
struct inv_icm45600_state *st = iio_device_get_drvdata(indio_dev);
|
||||
int ret;
|
||||
|
||||
if (count == 0)
|
||||
return 0;
|
||||
|
||||
guard(mutex)(&st->lock);
|
||||
|
||||
ret = inv_icm45600_buffer_hwfifo_flush(st, count);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
return st->fifo.nb.accel;
|
||||
}
|
||||
|
||||
static const struct iio_info inv_icm45600_accel_info = {
|
||||
.read_raw = inv_icm45600_accel_read_raw,
|
||||
.read_avail = inv_icm45600_accel_read_avail,
|
||||
.write_raw = inv_icm45600_accel_write_raw,
|
||||
.write_raw_get_fmt = inv_icm45600_accel_write_raw_get_fmt,
|
||||
.debugfs_reg_access = inv_icm45600_debugfs_reg,
|
||||
.update_scan_mode = inv_icm45600_accel_update_scan_mode,
|
||||
.hwfifo_set_watermark = inv_icm45600_accel_hwfifo_set_watermark,
|
||||
.hwfifo_flush_to_buffer = inv_icm45600_accel_hwfifo_flush,
|
||||
};
|
||||
|
||||
struct iio_dev *inv_icm45600_accel_init(struct inv_icm45600_state *st)
|
||||
{
|
||||
struct device *dev = regmap_get_device(st->map);
|
||||
struct inv_icm45600_sensor_state *accel_st;
|
||||
struct inv_sensors_timestamp_chip ts_chip;
|
||||
struct iio_dev *indio_dev;
|
||||
const char *name;
|
||||
int ret;
|
||||
|
||||
name = devm_kasprintf(dev, GFP_KERNEL, "%s-accel", st->chip_info->name);
|
||||
if (!name)
|
||||
return ERR_PTR(-ENOMEM);
|
||||
|
||||
indio_dev = devm_iio_device_alloc(dev, sizeof(*accel_st));
|
||||
if (!indio_dev)
|
||||
return ERR_PTR(-ENOMEM);
|
||||
accel_st = iio_priv(indio_dev);
|
||||
|
||||
accel_st->scales = st->chip_info->accel_scales;
|
||||
accel_st->scales_len = st->chip_info->accel_scales_len * 2;
|
||||
|
||||
/* low-power (LP) mode by default at init, no ULP mode */
|
||||
accel_st->power_mode = INV_ICM45600_SENSOR_MODE_LOW_POWER;
|
||||
ret = regmap_set_bits(st->map, INV_ICM45600_REG_SMC_CONTROL_0,
|
||||
INV_ICM45600_SMC_CONTROL_0_ACCEL_LP_CLK_SEL);
|
||||
if (ret)
|
||||
return ERR_PTR(ret);
|
||||
|
||||
/*
|
||||
* clock period is 32kHz (31250ns)
|
||||
* jitter is +/- 2% (20 per mille)
|
||||
*/
|
||||
ts_chip.clock_period = 31250;
|
||||
ts_chip.jitter = 20;
|
||||
ts_chip.init_period = inv_icm45600_odr_to_period(st->conf.accel.odr);
|
||||
inv_sensors_timestamp_init(&accel_st->ts, &ts_chip);
|
||||
|
||||
iio_device_set_drvdata(indio_dev, st);
|
||||
indio_dev->name = name;
|
||||
indio_dev->info = &inv_icm45600_accel_info;
|
||||
indio_dev->modes = INDIO_DIRECT_MODE;
|
||||
indio_dev->channels = inv_icm45600_accel_channels;
|
||||
indio_dev->num_channels = ARRAY_SIZE(inv_icm45600_accel_channels);
|
||||
indio_dev->available_scan_masks = inv_icm45600_accel_scan_masks;
|
||||
|
||||
ret = devm_iio_kfifo_buffer_setup(dev, indio_dev,
|
||||
&inv_icm45600_buffer_ops);
|
||||
if (ret)
|
||||
return ERR_PTR(ret);
|
||||
|
||||
ret = devm_iio_device_register(dev, indio_dev);
|
||||
if (ret)
|
||||
return ERR_PTR(ret);
|
||||
|
||||
return indio_dev;
|
||||
}
|
||||
|
||||
int inv_icm45600_accel_parse_fifo(struct iio_dev *indio_dev)
|
||||
{
|
||||
struct inv_icm45600_state *st = iio_device_get_drvdata(indio_dev);
|
||||
struct inv_icm45600_sensor_state *accel_st = iio_priv(indio_dev);
|
||||
struct inv_sensors_timestamp *ts = &accel_st->ts;
|
||||
ssize_t i, size;
|
||||
unsigned int no;
|
||||
|
||||
/* parse all fifo packets */
|
||||
for (i = 0, no = 0; i < st->fifo.count; i += size, ++no) {
|
||||
struct inv_icm45600_accel_buffer buffer = { };
|
||||
const struct inv_icm45600_fifo_sensor_data *accel, *gyro;
|
||||
const __le16 *timestamp;
|
||||
const s8 *temp;
|
||||
unsigned int odr;
|
||||
s64 ts_val;
|
||||
|
||||
size = inv_icm45600_fifo_decode_packet(&st->fifo.data[i],
|
||||
&accel, &gyro, &temp, ×tamp, &odr);
|
||||
/* quit if error or FIFO is empty */
|
||||
if (size <= 0)
|
||||
return size;
|
||||
|
||||
/* skip packet if no accel data or data is invalid */
|
||||
if (accel == NULL || !inv_icm45600_fifo_is_data_valid(accel))
|
||||
continue;
|
||||
|
||||
/* update odr */
|
||||
if (odr & INV_ICM45600_SENSOR_ACCEL)
|
||||
inv_sensors_timestamp_apply_odr(ts, st->fifo.period,
|
||||
st->fifo.nb.total, no);
|
||||
|
||||
memcpy(&buffer.accel, accel, sizeof(buffer.accel));
|
||||
/* convert 8 bits FIFO temperature in high resolution format */
|
||||
buffer.temp = temp ? (*temp * 64) : 0;
|
||||
ts_val = inv_sensors_timestamp_pop(ts);
|
||||
iio_push_to_buffers_with_ts(indio_dev, &buffer, sizeof(buffer), ts_val);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -454,6 +454,7 @@ int inv_icm45600_buffer_fifo_read(struct inv_icm45600_state *st,
|
|||
int inv_icm45600_buffer_fifo_parse(struct inv_icm45600_state *st)
|
||||
{
|
||||
struct inv_icm45600_sensor_state *gyro_st = iio_priv(st->indio_gyro);
|
||||
struct inv_icm45600_sensor_state *accel_st = iio_priv(st->indio_accel);
|
||||
struct inv_sensors_timestamp *ts;
|
||||
int ret;
|
||||
|
||||
|
|
@ -470,6 +471,16 @@ int inv_icm45600_buffer_fifo_parse(struct inv_icm45600_state *st)
|
|||
return ret;
|
||||
}
|
||||
|
||||
/* Handle accelerometer timestamp and FIFO data parsing. */
|
||||
if (st->fifo.nb.accel > 0) {
|
||||
ts = &accel_st->ts;
|
||||
inv_sensors_timestamp_interrupt(ts, st->fifo.watermark.eff_accel,
|
||||
st->timestamp.accel);
|
||||
ret = inv_icm45600_accel_parse_fifo(st->indio_accel);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -477,6 +488,7 @@ int inv_icm45600_buffer_hwfifo_flush(struct inv_icm45600_state *st,
|
|||
unsigned int count)
|
||||
{
|
||||
struct inv_icm45600_sensor_state *gyro_st = iio_priv(st->indio_gyro);
|
||||
struct inv_icm45600_sensor_state *accel_st = iio_priv(st->indio_accel);
|
||||
struct inv_sensors_timestamp *ts;
|
||||
s64 gyro_ts, accel_ts;
|
||||
int ret;
|
||||
|
|
@ -499,6 +511,14 @@ int inv_icm45600_buffer_hwfifo_flush(struct inv_icm45600_state *st,
|
|||
return ret;
|
||||
}
|
||||
|
||||
if (st->fifo.nb.accel > 0) {
|
||||
ts = &accel_st->ts;
|
||||
inv_sensors_timestamp_interrupt(ts, st->fifo.nb.accel, accel_ts);
|
||||
ret = inv_icm45600_accel_parse_fifo(st->indio_accel);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -144,6 +144,12 @@ static const struct inv_icm45600_conf inv_icm45600_default_conf = {
|
|||
.odr = INV_ICM45600_ODR_800HZ_LN,
|
||||
.filter = INV_ICM45600_GYRO_LP_AVG_SEL_8X,
|
||||
},
|
||||
.accel = {
|
||||
.mode = INV_ICM45600_SENSOR_MODE_OFF,
|
||||
.fs = INV_ICM45686_ACCEL_FS_16G,
|
||||
.odr = INV_ICM45600_ODR_800HZ_LN,
|
||||
.filter = INV_ICM45600_ACCEL_LP_AVG_SEL_4X,
|
||||
},
|
||||
};
|
||||
|
||||
static const struct inv_icm45600_conf inv_icm45686_default_conf = {
|
||||
|
|
@ -153,12 +159,20 @@ static const struct inv_icm45600_conf inv_icm45686_default_conf = {
|
|||
.odr = INV_ICM45600_ODR_800HZ_LN,
|
||||
.filter = INV_ICM45600_GYRO_LP_AVG_SEL_8X,
|
||||
},
|
||||
.accel = {
|
||||
.mode = INV_ICM45600_SENSOR_MODE_OFF,
|
||||
.fs = INV_ICM45686_ACCEL_FS_32G,
|
||||
.odr = INV_ICM45600_ODR_800HZ_LN,
|
||||
.filter = INV_ICM45600_ACCEL_LP_AVG_SEL_4X,
|
||||
},
|
||||
};
|
||||
|
||||
const struct inv_icm45600_chip_info inv_icm45605_chip_info = {
|
||||
.whoami = INV_ICM45600_WHOAMI_ICM45605,
|
||||
.name = "icm45605",
|
||||
.conf = &inv_icm45600_default_conf,
|
||||
.accel_scales = (const int *)inv_icm45600_accel_scale,
|
||||
.accel_scales_len = INV_ICM45600_ACCEL_FS_MAX,
|
||||
.gyro_scales = (const int *)inv_icm45600_gyro_scale,
|
||||
.gyro_scales_len = INV_ICM45600_GYRO_FS_MAX,
|
||||
};
|
||||
|
|
@ -168,6 +182,8 @@ const struct inv_icm45600_chip_info inv_icm45606_chip_info = {
|
|||
.whoami = INV_ICM45600_WHOAMI_ICM45606,
|
||||
.name = "icm45606",
|
||||
.conf = &inv_icm45600_default_conf,
|
||||
.accel_scales = (const int *)inv_icm45600_accel_scale,
|
||||
.accel_scales_len = INV_ICM45600_ACCEL_FS_MAX,
|
||||
.gyro_scales = (const int *)inv_icm45600_gyro_scale,
|
||||
.gyro_scales_len = INV_ICM45600_GYRO_FS_MAX,
|
||||
};
|
||||
|
|
@ -177,6 +193,8 @@ const struct inv_icm45600_chip_info inv_icm45608_chip_info = {
|
|||
.whoami = INV_ICM45600_WHOAMI_ICM45608,
|
||||
.name = "icm45608",
|
||||
.conf = &inv_icm45600_default_conf,
|
||||
.accel_scales = (const int *)inv_icm45600_accel_scale,
|
||||
.accel_scales_len = INV_ICM45600_ACCEL_FS_MAX,
|
||||
.gyro_scales = (const int *)inv_icm45600_gyro_scale,
|
||||
.gyro_scales_len = INV_ICM45600_GYRO_FS_MAX,
|
||||
};
|
||||
|
|
@ -186,6 +204,8 @@ const struct inv_icm45600_chip_info inv_icm45634_chip_info = {
|
|||
.whoami = INV_ICM45600_WHOAMI_ICM45634,
|
||||
.name = "icm45634",
|
||||
.conf = &inv_icm45600_default_conf,
|
||||
.accel_scales = (const int *)inv_icm45600_accel_scale,
|
||||
.accel_scales_len = INV_ICM45600_ACCEL_FS_MAX,
|
||||
.gyro_scales = (const int *)inv_icm45600_gyro_scale,
|
||||
.gyro_scales_len = INV_ICM45600_GYRO_FS_MAX,
|
||||
};
|
||||
|
|
@ -195,6 +215,8 @@ const struct inv_icm45600_chip_info inv_icm45686_chip_info = {
|
|||
.whoami = INV_ICM45600_WHOAMI_ICM45686,
|
||||
.name = "icm45686",
|
||||
.conf = &inv_icm45686_default_conf,
|
||||
.accel_scales = (const int *)inv_icm45686_accel_scale,
|
||||
.accel_scales_len = INV_ICM45686_ACCEL_FS_MAX,
|
||||
.gyro_scales = (const int *)inv_icm45686_gyro_scale,
|
||||
.gyro_scales_len = INV_ICM45686_GYRO_FS_MAX,
|
||||
};
|
||||
|
|
@ -204,6 +226,8 @@ const struct inv_icm45600_chip_info inv_icm45687_chip_info = {
|
|||
.whoami = INV_ICM45600_WHOAMI_ICM45687,
|
||||
.name = "icm45687",
|
||||
.conf = &inv_icm45686_default_conf,
|
||||
.accel_scales = (const int *)inv_icm45686_accel_scale,
|
||||
.accel_scales_len = INV_ICM45686_ACCEL_FS_MAX,
|
||||
.gyro_scales = (const int *)inv_icm45686_gyro_scale,
|
||||
.gyro_scales_len = INV_ICM45686_GYRO_FS_MAX,
|
||||
};
|
||||
|
|
@ -213,6 +237,8 @@ const struct inv_icm45600_chip_info inv_icm45688p_chip_info = {
|
|||
.whoami = INV_ICM45600_WHOAMI_ICM45688P,
|
||||
.name = "icm45688p",
|
||||
.conf = &inv_icm45686_default_conf,
|
||||
.accel_scales = (const int *)inv_icm45686_accel_scale,
|
||||
.accel_scales_len = INV_ICM45686_ACCEL_FS_MAX,
|
||||
.gyro_scales = (const int *)inv_icm45686_gyro_scale,
|
||||
.gyro_scales_len = INV_ICM45686_GYRO_FS_MAX,
|
||||
};
|
||||
|
|
@ -222,6 +248,8 @@ const struct inv_icm45600_chip_info inv_icm45689_chip_info = {
|
|||
.whoami = INV_ICM45600_WHOAMI_ICM45689,
|
||||
.name = "icm45689",
|
||||
.conf = &inv_icm45686_default_conf,
|
||||
.accel_scales = (const int *)inv_icm45686_accel_scale,
|
||||
.accel_scales_len = INV_ICM45686_ACCEL_FS_MAX,
|
||||
.gyro_scales = (const int *)inv_icm45686_gyro_scale,
|
||||
.gyro_scales_len = INV_ICM45686_GYRO_FS_MAX,
|
||||
};
|
||||
|
|
@ -740,6 +768,10 @@ int inv_icm45600_core_probe(struct regmap *regmap, const struct inv_icm45600_chi
|
|||
if (IS_ERR(st->indio_gyro))
|
||||
return PTR_ERR(st->indio_gyro);
|
||||
|
||||
st->indio_accel = inv_icm45600_accel_init(st);
|
||||
if (IS_ERR(st->indio_accel))
|
||||
return PTR_ERR(st->indio_accel);
|
||||
|
||||
ret = inv_icm45600_irq_init(st, irq, irq_type, open_drain);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user