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dt-bindings: net: Add FSD EQoS device tree bindings

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Add FSD Ethernet compatible in Synopsys dt-bindings document. Add FSD
Ethernet YAML schema to enable the DT validation.

Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Ravi Patel <ravi.patel@samsung.com>
Signed-off-by: Swathi K S <swathi.ks@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://patch.msgid.link/20250305091246.106626-2-swathi.ks@samsung.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Swathi K S 2025-03-05 14:42:45 +05:30 committed by Jakub Kicinski
parent e8f57a762b
commit 1f6c389983
2 changed files with 121 additions and 2 deletions
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5
Documentation/devicetree/bindings/net/snps,dwmac.yaml
View File

@ -102,6 +102,7 @@ properties:
- snps,dwxgmac-2.10
- starfive,jh7100-dwmac
- starfive,jh7110-dwmac
- tesla,fsd-ethqos
- thead,th1520-gmac
reg:
@ -126,7 +127,7 @@ properties:
clocks:
minItems: 1
maxItems: 8
maxItems: 10
additionalItems: true
items:
- description: GMAC main clock
@ -138,7 +139,7 @@ properties:
clock-names:
minItems: 1
maxItems: 8
maxItems: 10
additionalItems: true
contains:
enum:

118
Documentation/devicetree/bindings/net/tesla,fsd-ethqos.yaml Normal file
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@ -0,0 +1,118 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/tesla,fsd-ethqos.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: FSD Ethernet Quality of Service
maintainers:
- Swathi K S <swathi.ks@samsung.com>
description:
Tesla ethernet devices based on dwmmac support Gigabit ethernet.
allOf:
- $ref: snps,dwmac.yaml#
properties:
compatible:
const: tesla,fsd-ethqos
reg:
maxItems: 1
interrupts:
maxItems: 1
interrupt-names:
items:
- const: macirq
clocks:
minItems: 5
items:
- description: PTP clock
- description: Master bus clock
- description: Slave bus clock
- description: MAC TX clock
- description: MAC RX clock
- description: Master2 bus clock
- description: Slave2 bus clock
- description: RX MUX clock
- description: PHY RX clock
- description: PERIC RGMII clock
clock-names:
minItems: 5
items:
- const: ptp_ref
- const: master_bus
- const: slave_bus
- const: tx
- const: rx
- const: master2_bus
- const: slave2_bus
- const: eqos_rxclk_mux
- const: eqos_phyrxclk
- const: dout_peric_rgmii_clk
iommus:
maxItems: 1
phy-mode:
enum:
- rgmii
- rgmii-id
- rgmii-rxid
- rgmii-txid
required:
- compatible
- reg
- interrupts
- clocks
- clock-names
- iommus
- phy-mode
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/fsd-clk.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
soc {
#address-cells = <2>;
#size-cells = <2>;
ethernet1: ethernet@14300000 {
compatible = "tesla,fsd-ethqos";
reg = <0x0 0x14300000 0x0 0x10000>;
interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
clocks = <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_CLK_PTP_REF_I>,
<&clock_peric PERIC_EQOS_TOP_IPCLKPORT_ACLK_I>,
<&clock_peric PERIC_EQOS_TOP_IPCLKPORT_HCLK_I>,
<&clock_peric PERIC_EQOS_TOP_IPCLKPORT_RGMII_CLK_I>,
<&clock_peric PERIC_EQOS_TOP_IPCLKPORT_CLK_RX_I>,
<&clock_peric PERIC_BUS_D_PERIC_IPCLKPORT_EQOSCLK>,
<&clock_peric PERIC_BUS_P_PERIC_IPCLKPORT_EQOSCLK>,
<&clock_peric PERIC_EQOS_PHYRXCLK_MUX>,
<&clock_peric PERIC_EQOS_PHYRXCLK>,
<&clock_peric PERIC_DOUT_RGMII_CLK>;
clock-names = "ptp_ref", "master_bus", "slave_bus","tx",
"rx", "master2_bus", "slave2_bus", "eqos_rxclk_mux",
"eqos_phyrxclk","dout_peric_rgmii_clk";
assigned-clocks = <&clock_peric PERIC_EQOS_PHYRXCLK_MUX>,
<&clock_peric PERIC_EQOS_PHYRXCLK>;
assigned-clock-parents = <&clock_peric PERIC_EQOS_PHYRXCLK>;
pinctrl-names = "default";
pinctrl-0 = <&eth1_tx_clk>, <&eth1_tx_data>, <&eth1_tx_ctrl>,
<&eth1_phy_intr>, <&eth1_rx_clk>, <&eth1_rx_data>,
<&eth1_rx_ctrl>, <&eth1_mdio>;
iommus = <&smmu_peric 0x0 0x1>;
phy-mode = "rgmii-id";
};
};
...