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octeontx2-af: mcs: Clear stale X2P calibration state before calibration

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Some firmware versions leave MCSX_MIL_GLOBAL bit 5 set on boot.
If the bit is already set when the driver attempts X2P calibration,
the hardware sees no rising edge and calibration never triggers.
Clear the bit and wait briefly before starting calibration to ensure
a clean rising edge.

Fixes: ca7f49ff88 ("octeontx2-af: cn10k: Introduce driver for macsec block.")
Signed-off-by: Nitin Shetty J <nshettyj@marvell.com>
Signed-off-by: Viswajith Murali <viswajithm@marvell.com>
Link: https://patch.msgid.link/20260901094318.1395356-1-nshettyj@marvell.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Viswajith Murali 2026-09-01 15:13:17 +05:30 committed by Jakub Kicinski
parent 4b772869a1
commit 1f29543126
1 changed files with 10 additions and 0 deletions
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drivers/net/ethernet/marvell/octeontx2/af/mcs.c
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@ -1417,6 +1417,16 @@ static int mcs_x2p_calibration(struct mcs *mcs)
int i, err = 0;
u64 val;
/* Clear any stale calibration state left by firmware/bootloader.
* Some firmware versions may leave MCSX_MIL_GLOBAL bit 5 set,
* preventing the hardware from detecting the rising edge needed to
* trigger X2P calibration.
*/
val = mcs_reg_read(mcs, MCSX_MIL_GLOBAL);
val &= ~BIT_ULL(5);
mcs_reg_write(mcs, MCSX_MIL_GLOBAL, val);
usleep_range(100, 200);
/* set X2P calibration */
val = mcs_reg_read(mcs, MCSX_MIL_GLOBAL);
val |= BIT_ULL(5);