From 1f01baa02c15f2e1eebe368164369a4f7cef9cdf Mon Sep 17 00:00:00 2001 From: Channagoud Kadabi Date: Wed, 20 Dec 2017 11:46:30 -0800 Subject: [PATCH] ANDROID: GKI: drivers: clksource: Add API to return cval Sleep driver needs to program the absolute clock value for next expiry into pdc register for system wake up. Add an API to read the cval low and high counters. Signed-off-by: Channagoud Kadabi Bug: 152635062 Test: build (cherry picked from commit ee514e9083c5d9f3312a54fd317786da7c9abdb1) [surenb: replaced out-of-tree readl_relaxed_no_log with functionally identical in-tree readl_relaxed] Signed-off-by: Suren Baghdasaryan Change-Id: I1244c31c8a2717a6f2002cac3b26ee3526409058 Merged-In: I1244c31c8a2717a6f2002cac3b26ee3526409058 --- drivers/clocksource/arm_arch_timer.c | 19 +++++++++++++++++++ include/clocksource/arm_arch_timer.h | 5 +++++ 2 files changed, 24 insertions(+) diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 0445ad7e559e..be3f2c35783b 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -52,6 +52,8 @@ #define CNTFRQ 0x10 #define CNTP_TVAL 0x28 #define CNTP_CTL 0x2c +#define CNTCVAL_LO 0x30 +#define CNTCVAL_HI 0x34 #define CNTV_TVAL 0x38 #define CNTV_CTL 0x3c @@ -957,6 +959,23 @@ bool arch_timer_evtstrm_available(void) return cpumask_test_cpu(raw_smp_processor_id(), &evtstrm_available); } +void arch_timer_mem_get_cval(u32 *lo, u32 *hi) +{ + u32 ctrl; + + *lo = *hi = ~0U; + + if (!arch_counter_base) + return; + + ctrl = readl_relaxed(arch_counter_base + CNTV_CTL); + + if (ctrl & ARCH_TIMER_CTRL_ENABLE) { + *lo = readl_relaxed(arch_counter_base + CNTCVAL_LO); + *hi = readl_relaxed(arch_counter_base + CNTCVAL_HI); + } +} + static u64 arch_counter_get_cntvct_mem(void) { u32 vct_lo, vct_hi, tmp_hi; diff --git a/include/clocksource/arm_arch_timer.h b/include/clocksource/arm_arch_timer.h index 349e5957c949..99ccc84f42c6 100644 --- a/include/clocksource/arm_arch_timer.h +++ b/include/clocksource/arm_arch_timer.h @@ -96,6 +96,7 @@ extern u32 arch_timer_get_rate(void); extern u64 (*arch_timer_read_counter)(void); extern struct arch_timer_kvm_info *arch_timer_get_kvm_info(void); extern bool arch_timer_evtstrm_available(void); +extern void arch_timer_mem_get_cval(u32 *lo, u32 *hi); #else @@ -114,6 +115,10 @@ static inline bool arch_timer_evtstrm_available(void) return false; } +static void arch_timer_mem_get_cval(u32 *lo, u32 *hi) +{ + *lo = *hi = ~0U; +} #endif #endif