From 1ed0420217fa18fc44a8cba285d10645073ce1a0 Mon Sep 17 00:00:00 2001 From: Imre Deak Date: Wed, 25 Feb 2026 18:46:00 +0200 Subject: [PATCH] drm/i915/dp_mst: Verify the link status always the same way The MST link status should be always verified from the same DPCD registers after link training. Atm, both the legacy (0x202 - 0x205) and the ESI (0x200C - 0x200F) link status registers are used. Use always the latter ESI version of link status registers. v2: Propagate error from intel_dp_read_link_status(). (Jani, Luca) Cc: Jani Nikula Reviewed-by: Luca Coelho Signed-off-by: Imre Deak Link: https://patch.msgid.link/20260225164618.1261368-3-imre.deak@intel.com --- drivers/gpu/drm/i915/display/intel_dp.c | 20 ++++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 9dbc44cbe8c7..ac6cacd19d17 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -5568,6 +5568,23 @@ intel_dp_handle_hdmi_link_status_change(struct intel_dp *intel_dp) } } +static int +intel_dp_read_link_status(struct intel_dp *intel_dp, u8 link_status[DP_LINK_STATUS_SIZE]) +{ + int err; + + memset(link_status, 0, DP_LINK_STATUS_SIZE); + + if (intel_dp_mst_active_streams(intel_dp) > 0) + err = drm_dp_dpcd_read_data(&intel_dp->aux, DP_LANE0_1_STATUS_ESI, + link_status, DP_LINK_STATUS_SIZE - 2); + else + err = drm_dp_dpcd_read_phy_link_status(&intel_dp->aux, DP_PHY_DPRX, + link_status); + + return err; +} + static bool intel_dp_needs_link_retrain(struct intel_dp *intel_dp) { @@ -5590,8 +5607,7 @@ intel_dp_needs_link_retrain(struct intel_dp *intel_dp) if (intel_dp->link.force_retrain) return true; - if (drm_dp_dpcd_read_phy_link_status(&intel_dp->aux, DP_PHY_DPRX, - link_status) < 0) + if (intel_dp_read_link_status(intel_dp, link_status) < 0) return false; /*