From 1e204f604dd7ba571d50fe73034da6237eb6c447 Mon Sep 17 00:00:00 2001 From: David Dai Date: Wed, 28 Aug 2019 21:41:07 -0700 Subject: [PATCH] clk: qcom: clk-rcg2: add callbacks to deal with voltage voting Specify prepare, unprepare and pre/post rate change callbacks for all clk-rcg2 clk_ops. This ensures that supply regulator requirements are managed properly at runtime. Change-Id: I6d7e31983e99c2ef9f546771d7046e8f0111debc Signed-off-by: David Dai Signed-off-by: Mike Tipton --- drivers/clk/qcom/clk-rcg2.c | 40 +++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c index f42946b5f21e..44ff5792628c 100644 --- a/drivers/clk/qcom/clk-rcg2.c +++ b/drivers/clk/qcom/clk-rcg2.c @@ -709,6 +709,10 @@ static void clk_rcg2_disable(struct clk_hw *hw) } const struct clk_ops clk_rcg2_ops = { + .prepare = clk_prepare_regmap, + .unprepare = clk_unprepare_regmap, + .pre_rate_change = clk_pre_change_regmap, + .post_rate_change = clk_post_change_regmap, .is_enabled = clk_rcg2_is_enabled, .enable = clk_rcg2_enable, .disable = clk_rcg2_disable, @@ -724,6 +728,10 @@ const struct clk_ops clk_rcg2_ops = { EXPORT_SYMBOL_GPL(clk_rcg2_ops); const struct clk_ops clk_rcg2_floor_ops = { + .prepare = clk_prepare_regmap, + .unprepare = clk_unprepare_regmap, + .pre_rate_change = clk_pre_change_regmap, + .post_rate_change = clk_post_change_regmap, .is_enabled = clk_rcg2_is_enabled, .get_parent = clk_rcg2_get_parent, .set_parent = clk_rcg2_set_parent, @@ -855,6 +863,10 @@ static int clk_edp_pixel_determine_rate(struct clk_hw *hw, } const struct clk_ops clk_edp_pixel_ops = { + .prepare = clk_prepare_regmap, + .unprepare = clk_unprepare_regmap, + .pre_rate_change = clk_pre_change_regmap, + .post_rate_change = clk_post_change_regmap, .is_enabled = clk_rcg2_is_enabled, .get_parent = clk_rcg2_get_parent, .set_parent = clk_rcg2_set_parent, @@ -915,6 +927,10 @@ static int clk_byte_set_rate_and_parent(struct clk_hw *hw, } const struct clk_ops clk_byte_ops = { + .prepare = clk_prepare_regmap, + .unprepare = clk_unprepare_regmap, + .pre_rate_change = clk_pre_change_regmap, + .post_rate_change = clk_post_change_regmap, .is_enabled = clk_rcg2_is_enabled, .get_parent = clk_rcg2_get_parent, .set_parent = clk_rcg2_set_parent, @@ -985,6 +1001,10 @@ static int clk_byte2_set_rate_and_parent(struct clk_hw *hw, } const struct clk_ops clk_byte2_ops = { + .prepare = clk_prepare_regmap, + .unprepare = clk_unprepare_regmap, + .pre_rate_change = clk_pre_change_regmap, + .post_rate_change = clk_post_change_regmap, .is_enabled = clk_rcg2_is_enabled, .get_parent = clk_rcg2_get_parent, .set_parent = clk_rcg2_set_parent, @@ -1075,6 +1095,10 @@ static int clk_pixel_set_rate_and_parent(struct clk_hw *hw, unsigned long rate, } const struct clk_ops clk_pixel_ops = { + .prepare = clk_prepare_regmap, + .unprepare = clk_unprepare_regmap, + .pre_rate_change = clk_pre_change_regmap, + .post_rate_change = clk_post_change_regmap, .is_enabled = clk_rcg2_is_enabled, .get_parent = clk_rcg2_get_parent, .set_parent = clk_rcg2_set_parent, @@ -1182,6 +1206,10 @@ static int clk_gfx3d_set_rate(struct clk_hw *hw, unsigned long rate, } const struct clk_ops clk_gfx3d_ops = { + .prepare = clk_prepare_regmap, + .unprepare = clk_unprepare_regmap, + .pre_rate_change = clk_pre_change_regmap, + .post_rate_change = clk_post_change_regmap, .is_enabled = clk_rcg2_is_enabled, .get_parent = clk_rcg2_get_parent, .set_parent = clk_rcg2_set_parent, @@ -1288,6 +1316,10 @@ static void clk_rcg2_shared_disable(struct clk_hw *hw) } const struct clk_ops clk_rcg2_shared_ops = { + .prepare = clk_prepare_regmap, + .unprepare = clk_unprepare_regmap, + .pre_rate_change = clk_pre_change_regmap, + .post_rate_change = clk_post_change_regmap, .enable = clk_rcg2_shared_enable, .disable = clk_rcg2_shared_disable, .get_parent = clk_rcg2_get_parent, @@ -1431,6 +1463,10 @@ clk_rcg2_dfs_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) } static const struct clk_ops clk_rcg2_dfs_ops = { + .prepare = clk_prepare_regmap, + .unprepare = clk_unprepare_regmap, + .pre_rate_change = clk_pre_change_regmap, + .post_rate_change = clk_post_change_regmap, .is_enabled = clk_rcg2_is_enabled, .get_parent = clk_rcg2_get_parent, .determine_rate = clk_rcg2_dfs_determine_rate, @@ -1552,6 +1588,10 @@ static int clk_rcg2_dp_determine_rate(struct clk_hw *hw, } const struct clk_ops clk_dp_ops = { + .prepare = clk_prepare_regmap, + .unprepare = clk_unprepare_regmap, + .pre_rate_change = clk_pre_change_regmap, + .post_rate_change = clk_post_change_regmap, .is_enabled = clk_rcg2_is_enabled, .get_parent = clk_rcg2_get_parent, .set_parent = clk_rcg2_set_parent,