arm64: dts: imx952-evk: Add sound-wm8962 support

Add wm8962 sound card. By connecting with ASRC1, the sound card support
sample rate conversion. ASRC2 is also enabled, which can provide memory
to memory user interface.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
This commit is contained in:
Shengjiu Wang 2026-03-16 10:14:37 +08:00 committed by Frank Li
parent ab092e2221
commit 1e191b6cd9

View File

@ -110,6 +110,15 @@ reg_vref_1v8: regulator-adc-vref {
regulator-max-microvolt = <1800000>;
};
reg_audio_pwr: regulator-audio-pwr {
compatible = "regulator-fixed";
regulator-name = "audio-pwr";
regulator-max-microvolt = <3300000>;
regulator-min-microvolt = <3300000>;
gpio = <&i2c4_pcal6408 1 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_usdhc2_vmmc: regulator-usdhc2 {
compatible = "regulator-fixed";
pinctrl-names = "default";
@ -131,6 +140,51 @@ reg_usb_vbus: regulator-vbus {
enable-active-high;
};
sound-wm8962 {
compatible = "fsl,imx-audio-wm8962";
audio-asrc = <&asrc1>;
audio-codec = <&wm8962>;
audio-cpu = <&sai3>;
audio-routing = "Headphone Jack", "HPOUTL",
"Headphone Jack", "HPOUTR",
"Ext Spk", "SPKOUTL",
"Ext Spk", "SPKOUTR",
"AMIC", "MICBIAS",
"IN3R", "AMIC",
"IN1R", "AMIC";
hp-det-gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
model = "wm8962-audio";
pinctrl-0 = <&pinctrl_hp>;
pinctrl-names = "default";
};
};
&asrc1 {
assigned-clocks = <&scmi_clk IMX952_CLK_AUDIOPLL1_VCO>,
<&scmi_clk IMX952_CLK_AUDIOPLL2_VCO>,
<&scmi_clk IMX952_CLK_AUDIOPLL1>,
<&scmi_clk IMX952_CLK_AUDIOPLL2>,
<&scmi_clk IMX952_CLK_ASRC1>;
assigned-clock-parents = <0>, <0>, <0>, <0>,
<&scmi_clk IMX952_CLK_AUDIOPLL1>;
assigned-clock-rates = <3932160000>, <3612672000>,
<393216000>, <361267200>, <49152000>;
fsl,asrc-rate = <48000>;
status = "okay";
};
&asrc2 {
assigned-clocks = <&scmi_clk IMX952_CLK_AUDIOPLL1_VCO>,
<&scmi_clk IMX952_CLK_AUDIOPLL2_VCO>,
<&scmi_clk IMX952_CLK_AUDIOPLL1>,
<&scmi_clk IMX952_CLK_AUDIOPLL2>,
<&scmi_clk IMX952_CLK_ASRC2>;
assigned-clock-parents = <0>, <0>, <0>, <0>,
<&scmi_clk IMX952_CLK_AUDIOPLL1>;
assigned-clock-rates = <3932160000>, <3612672000>,
<393216000>, <361267200>, <49152000>;
fsl,asrc-rate = <48000>;
status = "okay";
};
/* pin conflict with PDM */
@ -185,6 +239,27 @@ &lpi2c4 {
pinctrl-0 = <&pinctrl_lpi2c4>;
status = "okay";
wm8962: audio-codec@1a {
compatible = "wlf,wm8962";
reg = <0x1a>;
clocks = <&scmi_clk IMX952_CLK_SAI3>;
AVDD-supply = <&reg_audio_pwr>;
CPVDD-supply = <&reg_audio_pwr>;
DBVDD-supply = <&reg_audio_pwr>;
DCVDD-supply = <&reg_audio_pwr>;
gpio-cfg = < 0x0000 /* 0:Default */
0x0000 /* 1:Default */
0x0000 /* 2:FN_DMICCLK */
0x0000 /* 3:Default */
0x0000 /* 4:FN_DMICCDAT */
0x0000 /* 5:Default */
>;
MICVDD-supply = <&reg_audio_pwr>;
PLLVDD-supply = <&reg_audio_pwr>;
SPKVDD1-supply = <&reg_audio_pwr>;
SPKVDD2-supply = <&reg_audio_pwr>;
};
i2c4_pcal6408: gpio@21 {
compatible = "nxp,pcal6408";
reg = <0x21>;
@ -312,6 +387,24 @@ &lpspi7 {
status = "okay";
};
&sai3 {
assigned-clocks = <&scmi_clk IMX952_CLK_AUDIOPLL1_VCO>,
<&scmi_clk IMX952_CLK_AUDIOPLL2_VCO>,
<&scmi_clk IMX952_CLK_AUDIOPLL1>,
<&scmi_clk IMX952_CLK_AUDIOPLL2>,
<&scmi_clk IMX952_CLK_SAI3>;
assigned-clock-parents = <0>, <0>, <0>, <0>,
<&scmi_clk IMX952_CLK_AUDIOPLL1>;
assigned-clock-rates = <3932160000>, <3612672000>,
<393216000>, <361267200>, <12288000>;
pinctrl-0 = <&pinctrl_sai3>;
pinctrl-1 = <&pinctrl_sai3_sleep>;
pinctrl-names = "default", "sleep";
fsl,sai-amix-mode = "bypass";
fsl,sai-mclk-direction-output;
status = "okay";
};
&scmi_misc {
nxp,ctrl-ids = <BRD_SM_CTRL_SD3_WAKE 1
BRD_SM_CTRL_M2E_WAKE 1
@ -402,6 +495,12 @@ IMX952_PAD_GPIO_IO27__WAKEUPMIX_TOP_CAN2_RX 0x39e
>;
};
pinctrl_hp: hpgrp {
fsl,pins = <
IMX952_PAD_GPIO_IO11__WAKEUPMIX_TOP_GPIO2_IO_11 0x31e
>;
};
pinctrl_lpi2c2: lpi2c2grp {
fsl,pins = <
IMX952_PAD_I2C2_SCL__AONMIX_TOP_LPI2C2_SCL 0x40000b9e
@ -476,6 +575,26 @@ IMX952_PAD_SD2_RESET_B__WAKEUPMIX_TOP_GPIO3_IO_7 0x31e
>;
};
pinctrl_sai3: sai3grp {
fsl,pins = <
IMX952_PAD_GPIO_IO17__WAKEUPMIX_TOP_SAI3_MCLK 0x31e
IMX952_PAD_GPIO_IO16__WAKEUPMIX_TOP_AUDMIX_TDM_OUT_TXBCLK 0x31e
IMX952_PAD_GPIO_IO26__WAKEUPMIX_TOP_AUDMIX_TDM_OUT_TXSYNC 0x31e
IMX952_PAD_GPIO_IO20__WAKEUPMIX_TOP_SAI3_RX_DATA_0 0x31e
IMX952_PAD_GPIO_IO21__WAKEUPMIX_TOP_AUDMIX_TDM_OUT_TXDATA 0x31e
>;
};
pinctrl_sai3_sleep: sai3sleepgrp {
fsl,pins = <
IMX952_PAD_GPIO_IO17__WAKEUPMIX_TOP_GPIO2_IO_17 0x31e
IMX952_PAD_GPIO_IO16__WAKEUPMIX_TOP_GPIO2_IO_16 0x31e
IMX952_PAD_GPIO_IO26__WAKEUPMIX_TOP_GPIO2_IO_26 0x31e
IMX952_PAD_GPIO_IO20__WAKEUPMIX_TOP_GPIO2_IO_20 0x31e
IMX952_PAD_GPIO_IO21__WAKEUPMIX_TOP_GPIO2_IO_21 0x31e
>;
};
pinctrl_tpm3: tpm3grp {
fsl,pins = <
IMX952_PAD_GPIO_IO12__WAKEUPMIX_TOP_TPM3_CH2 0x51e