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FROMLIST: scsi: ufs: Add dev ref clock gating wait time support

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In UFS version 3.0, a newly added attribute bRefClkGatingWaitTime defines
the minimum time for which the reference clock is required by device during
transition to LS-MODE or HIBERN8 state. Make this change to reflect the new
requirement by adding delays before turning off the clock.

Bug: 143632303
Change-Id: I8d5c1dfcb8cdf0e829933d34a7e9bb207d0e1084
Link: https://lore.kernel.org/patchwork/patch/1149892/
Signed-off-by: Can Guo <cang@codeaurora.org>
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
This commit is contained in:
Can Guo 2018-10-17 21:24:27 -07:00 committed by Todd Kjos
parent cfe099a8bd
commit 1ddc9771d5
2 changed files with 49 additions and 0 deletions
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3
drivers/scsi/ufs/ufs.h
View File

@ -168,6 +168,7 @@ enum attr_idn {
QUERY_ATTR_IDN_FFU_STATUS = 0x14, QUERY_ATTR_IDN_FFU_STATUS = 0x14,
QUERY_ATTR_IDN_PSA_STATE = 0x15, QUERY_ATTR_IDN_PSA_STATE = 0x15,
QUERY_ATTR_IDN_PSA_DATA_SIZE = 0x16, QUERY_ATTR_IDN_PSA_DATA_SIZE = 0x16,
QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME = 0x17,
}; };
/* Descriptor idn for Query requests */ /* Descriptor idn for Query requests */
@ -530,6 +531,8 @@ struct ufs_dev_info {
bool f_power_on_wp_en; bool f_power_on_wp_en;
/* Keeps information if any of the LU is power on write protected */ /* Keeps information if any of the LU is power on write protected */
bool is_lu_power_on_wp; bool is_lu_power_on_wp;
u16 spec_version;
u32 clk_gating_wait_us;
}; };
#define MAX_MODEL_LEN 16 #define MAX_MODEL_LEN 16

46
drivers/scsi/ufs/ufshcd.c
View File

@ -92,6 +92,9 @@
/* default delay of autosuspend: 2000 ms */ /* default delay of autosuspend: 2000 ms */
#define RPM_AUTOSUSPEND_DELAY_MS 2000 #define RPM_AUTOSUSPEND_DELAY_MS 2000
/* Default value of wait time before gating device ref clock */
#define UFSHCD_REF_CLK_GATING_WAIT_US 0xFF /* microsecs */
#define ufshcd_toggle_vreg(_dev, _vreg, _on) \ #define ufshcd_toggle_vreg(_dev, _vreg, _on) \
({ \ ({ \
int _ret; \ int _ret; \
@ -3395,6 +3398,37 @@ static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba,
param_offset, param_read_buf, param_size); param_offset, param_read_buf, param_size);
} }
static int ufshcd_get_ref_clk_gating_wait(struct ufs_hba *hba)
{
int err = 0;
u32 gating_wait = UFSHCD_REF_CLK_GATING_WAIT_US;
if (hba->dev_info.spec_version >= 0x300) {
err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME, 0, 0,
&gating_wait);
if (err)
dev_err(hba->dev, "Failed reading bRefClkGatingWait. err = %d, use default %uus\n",
err, gating_wait);
if (gating_wait == 0) {
gating_wait = UFSHCD_REF_CLK_GATING_WAIT_US;
dev_err(hba->dev, "Undefined ref clk gating wait time, use default %uus\n",
gating_wait);
}
/*
* bRefClkGatingWaitTime defines the minimum time for which the
* reference clock is required by device during transition from
* HS-MODE to LS-MODE or HIBERN8 state. Give it more time to be
* on the safe side.
*/
hba->dev_info.clk_gating_wait_us = gating_wait + 50;
}
return err;
}
/** /**
* ufshcd_memory_alloc - allocate memory for host memory space data structures * ufshcd_memory_alloc - allocate memory for host memory space data structures
* @hba: per adapter instance * @hba: per adapter instance
@ -6700,6 +6734,10 @@ static int ufs_get_device_desc(struct ufs_hba *hba,
dev_desc->wmanufacturerid = desc_buf[DEVICE_DESC_PARAM_MANF_ID] << 8 | dev_desc->wmanufacturerid = desc_buf[DEVICE_DESC_PARAM_MANF_ID] << 8 |
desc_buf[DEVICE_DESC_PARAM_MANF_ID + 1]; desc_buf[DEVICE_DESC_PARAM_MANF_ID + 1];
/* getting Specification Version in big endian format */
hba->dev_info.spec_version = desc_buf[DEVICE_DESC_PARAM_SPEC_VER] << 8 |
desc_buf[DEVICE_DESC_PARAM_SPEC_VER + 1];
model_index = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME]; model_index = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME];
err = ufshcd_read_string_desc(hba, model_index, err = ufshcd_read_string_desc(hba, model_index,
&dev_desc->model, SD_ASCII_STD); &dev_desc->model, SD_ASCII_STD);
@ -7116,6 +7154,9 @@ static int ufshcd_probe_hba(struct ufs_hba *hba)
/* clear any previous UFS device information */ /* clear any previous UFS device information */
memset(&hba->dev_info, 0, sizeof(hba->dev_info)); memset(&hba->dev_info, 0, sizeof(hba->dev_info));
ufshcd_get_ref_clk_gating_wait(hba);
if (!ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG, if (!ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
QUERY_FLAG_IDN_PWR_ON_WPE, &flag)) QUERY_FLAG_IDN_PWR_ON_WPE, &flag))
hba->dev_info.f_power_on_wp_en = flag; hba->dev_info.f_power_on_wp_en = flag;
@ -7442,12 +7483,17 @@ static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
struct ufs_clk_info *clki; struct ufs_clk_info *clki;
struct list_head *head = &hba->clk_list_head; struct list_head *head = &hba->clk_list_head;
unsigned long flags; unsigned long flags;
unsigned long gating_wait;
ktime_t start = ktime_get(); ktime_t start = ktime_get();
bool clk_state_changed = false; bool clk_state_changed = false;
if (list_empty(head)) if (list_empty(head))
goto out; goto out;
gating_wait = (unsigned long)hba->dev_info.clk_gating_wait_us;
if (!on && !skip_ref_clk && !!gating_wait)
usleep_range(gating_wait, gating_wait + 10);
ret = ufshcd_vops_setup_clocks(hba, on, PRE_CHANGE); ret = ufshcd_vops_setup_clocks(hba, on, PRE_CHANGE);
if (ret) if (ret)
return ret; return ret;