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hisi_acc_vfio_pci: update function return values.

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In this driver file, many functions call sub-functions and use ret
to store the error code of the sub-functions.
However, instead of directly returning ret to the caller, they use a
converted error code, which prevents the end-user from clearly
understanding the root cause of the error.
Therefore, the code needs to be modified to directly return the error
code from the sub-functions.

Signed-off-by: Longfang Liu <liulongfang@huawei.com>
Reviewed-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
Link: https://lore.kernel.org/r/20250510081155.55840-7-liulongfang@huawei.com
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
This commit is contained in:
Longfang Liu 2025-05-10 16:11:55 +08:00 committed by Alex Williamson
parent 2777a40998
commit 1dcf2cf102
1 changed files with 16 additions and 13 deletions
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29
drivers/vfio/pci/hisilicon/hisi_acc_vfio_pci.c
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@ -190,9 +190,10 @@ static int qm_set_regs(struct hisi_qm *qm, struct acc_vf_data *vf_data)
int ret;
/* Check VF state */
if (unlikely(hisi_qm_wait_mb_ready(qm))) {
ret = hisi_qm_wait_mb_ready(qm);
if (unlikely(ret)) {
dev_err(&qm->pdev->dev, "QM device is not ready to write\n");
return -EBUSY;
return ret;
}
ret = qm_write_regs(qm, QM_VF_AEQ_INT_MASK, &vf_data->aeq_int_mask, 1);
@ -325,13 +326,15 @@ static void qm_dev_cmd_init(struct hisi_qm *qm)
static int vf_qm_cache_wb(struct hisi_qm *qm)
{
unsigned int val;
int ret;
writel(0x1, qm->io_base + QM_CACHE_WB_START);
if (readl_relaxed_poll_timeout(qm->io_base + QM_CACHE_WB_DONE,
ret = readl_relaxed_poll_timeout(qm->io_base + QM_CACHE_WB_DONE,
val, val & BIT(0), MB_POLL_PERIOD_US,
MB_POLL_TIMEOUT_US)) {
MB_POLL_TIMEOUT_US);
if (ret) {
dev_err(&qm->pdev->dev, "vf QM writeback sqc cache fail\n");
return -EINVAL;
return ret;
}
return 0;
@ -392,7 +395,7 @@ static int vf_qm_check_match(struct hisi_acc_vf_core_device *hisi_acc_vdev,
ret = vf_qm_version_check(vf_data, dev);
if (ret) {
dev_err(dev, "failed to match ACC_DEV_MAGIC\n");
return -EINVAL;
return ret;
}
if (vf_data->dev_id != hisi_acc_vdev->vf_dev->device) {
@ -404,7 +407,7 @@ static int vf_qm_check_match(struct hisi_acc_vf_core_device *hisi_acc_vdev,
ret = qm_get_vft(vf_qm, &vf_qm->qp_base);
if (ret <= 0) {
dev_err(dev, "failed to get vft qp nums\n");
return -EINVAL;
return ret;
}
if (ret != vf_data->qp_num) {
@ -501,7 +504,7 @@ static int vf_qm_load_data(struct hisi_acc_vf_core_device *hisi_acc_vdev,
ret = qm_write_regs(qm, QM_VF_STATE, &vf_data->vf_qm_state, 1);
if (ret) {
dev_err(dev, "failed to write QM_VF_STATE\n");
return -EINVAL;
return ret;
}
hisi_acc_vdev->vf_qm_state = vf_data->vf_qm_state;
@ -542,7 +545,7 @@ static int vf_qm_read_data(struct hisi_qm *vf_qm, struct acc_vf_data *vf_data)
ret = qm_get_regs(vf_qm, vf_data);
if (ret)
return -EINVAL;
return ret;
/* Every reg is 32 bit, the dma address is 64 bit. */
vf_data->eqe_dma = vf_data->qm_eqc_dw[QM_XQC_ADDR_HIGH];
@ -556,13 +559,13 @@ static int vf_qm_read_data(struct hisi_qm *vf_qm, struct acc_vf_data *vf_data)
ret = qm_get_sqc(vf_qm, &vf_data->sqc_dma);
if (ret) {
dev_err(dev, "failed to read SQC addr!\n");
return -EINVAL;
return ret;
}
ret = qm_get_cqc(vf_qm, &vf_data->cqc_dma);
if (ret) {
dev_err(dev, "failed to read CQC addr!\n");
return -EINVAL;
return ret;
}
return 0;
@ -588,7 +591,7 @@ static int vf_qm_state_save(struct hisi_acc_vf_core_device *hisi_acc_vdev,
ret = vf_qm_read_data(vf_qm, vf_data);
if (ret)
return -EINVAL;
return ret;
migf->total_length = sizeof(struct acc_vf_data);
/* Save eqc and aeqc interrupt information */
@ -1379,7 +1382,7 @@ static int hisi_acc_vf_debug_check(struct seq_file *seq, struct vfio_device *vde
ret = qm_wait_dev_not_ready(vf_qm);
if (ret) {
seq_puts(seq, "VF device not ready!\n");
return -EBUSY;
return ret;
}
return 0;