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RK3368 GPU version: Rogue M 1.31

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1. Reopen bEnableRDPowIsland since it doesn't appear splash screen when click the drawerbutton.
2. Remove hGPUUtilLock to avoid dead lock.
3. Get raw ion_device by IonDevAcquire.
4. Merge 1.5_ED3830101 DDK code.

Change-Id: I9b8cef3ddf13dac65663827b88609bfab812e573
Signed-off-by: zxl <zhuangxl@rock-chips.com>
This commit is contained in:
zxl 2016-01-06 14:10:45 +08:00 committed by Huang, Tao
parent 225123d945
commit 1da242fea4
49 changed files with 505 additions and 148 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
drivers/gpu/rogue_m/build/linux/config/core.mk
View File

@ -740,6 +740,11 @@ Collect information about allocations such as descriptive strings_\
and timing data for more detailed page fault analysis._\
))
$(eval $(call TunableKernelConfigC,PVR_DISABLE_KMALLOC_MEMSTATS,,\
Set to avoid gathering statistical information about kmalloc and vmalloc_\
allocations._\
))
$(eval $(call TunableBothConfigC,PVRSRV_ENABLE_MEMORY_STATS,,\
Enable Memory allocations to be recorded and published via Process Statistics._\
))

4
drivers/gpu/rogue_m/build/linux/pc_android/Makefile
View File

@ -138,3 +138,7 @@ include ../common/android/extra_config.mk
include ../common/pvrgdb.mk
include ../common/3rdparty.mk
include ../common/testchip.mk
# For VP this needs to be external visible options
$(eval $(call KernelConfigC,TC_APOLLO_ES2,))
$(eval $(call TunableKernelConfigC,VIRTUAL_PLATFORM,))

8
drivers/gpu/rogue_m/hwdefs/km/cores/rgxcore_km_1.33.2.5.h
View File

@ -42,8 +42,8 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#ifndef _RGXCORE_KM_1_33_2_5_H_
#define _RGXCORE_KM_1_33_2_5_H_
/***** Automatically generated file (3/4/2015 2:27:36 PM): Do not edit manually ********************/
/***** Timestamp: (3/4/2015 2:27:36 PM)************************************************************/
/***** Automatically generated file (26/08/2015 09:15:02): Do not edit manually ********************/
/***** Timestamp: (26/08/2015 09:15:02)************************************************************/
/***** CS: @2106753 ******************************************************************/
@ -59,7 +59,11 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* Errata
*****************************************************************************/
#define FIX_HW_BRN_37918
#define FIX_HW_BRN_38344
#define FIX_HW_BRN_42321
#define FIX_HW_BRN_44455
#define FIX_HW_BRN_54441

8
drivers/gpu/rogue_m/hwdefs/km/cores/rgxcore_km_1.39.4.19.h
View File

@ -42,8 +42,8 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#ifndef _RGXCORE_KM_1_39_4_19_H_
#define _RGXCORE_KM_1_39_4_19_H_
/***** Automatically generated file (3/4/2015 2:27:37 PM): Do not edit manually ********************/
/***** Timestamp: (3/4/2015 2:27:37 PM)************************************************************/
/***** Automatically generated file (26/08/2015 09:15:02): Do not edit manually ********************/
/***** Timestamp: (26/08/2015 09:15:02)************************************************************/
/***** CS: @2784771 ******************************************************************/
@ -60,12 +60,16 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*****************************************************************************/
#define FIX_HW_BRN_38344
#define FIX_HW_BRN_42321
#define FIX_HW_BRN_44455
#define FIX_HW_BRN_54441
/******************************************************************************
* Enhancements
*****************************************************************************/
#define HW_ERN_36400

8
drivers/gpu/rogue_m/hwdefs/km/cores/rgxcore_km_1.48.2.0.h
View File

@ -42,8 +42,8 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#ifndef _RGXCORE_KM_1_48_2_0_H_
#define _RGXCORE_KM_1_48_2_0_H_
/***** Automatically generated file (3/4/2015 2:27:36 PM): Do not edit manually ********************/
/***** Timestamp: (3/4/2015 2:27:36 PM)************************************************************/
/***** Automatically generated file (26/08/2015 09:15:02): Do not edit manually ********************/
/***** Timestamp: (26/08/2015 09:15:02)************************************************************/
/***** CS: @2523218 ******************************************************************/
@ -60,12 +60,16 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*****************************************************************************/
#define FIX_HW_BRN_38344
#define FIX_HW_BRN_42321
#define FIX_HW_BRN_44455
#define FIX_HW_BRN_54441
/******************************************************************************
* Enhancements
*****************************************************************************/
#define HW_ERN_36400

7
drivers/gpu/rogue_m/hwdefs/km/cores/rgxcore_km_1.72.4.12.h
View File

@ -42,8 +42,8 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#ifndef _RGXCORE_KM_1_72_4_12_H_
#define _RGXCORE_KM_1_72_4_12_H_
/***** Automatically generated file (3/4/2015 2:27:34 PM): Do not edit manually ********************/
/***** Timestamp: (3/4/2015 2:27:34 PM)************************************************************/
/***** Automatically generated file (26/08/2015 09:15:06): Do not edit manually ********************/
/***** Timestamp: (26/08/2015 09:15:06)************************************************************/
/***** CS: @2646650 ******************************************************************/
@ -59,12 +59,15 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* Errata
*****************************************************************************/
#define FIX_HW_BRN_44455
#define FIX_HW_BRN_54441
/******************************************************************************
* Enhancements
*****************************************************************************/
#define HW_ERN_36400

8
drivers/gpu/rogue_m/hwdefs/km/cores/rgxcore_km_1.75.2.20.h
View File

@ -42,8 +42,8 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#ifndef _RGXCORE_KM_1_75_2_20_H_
#define _RGXCORE_KM_1_75_2_20_H_
/***** Automatically generated file (3/4/2015 2:27:36 PM): Do not edit manually ********************/
/***** Timestamp: (3/4/2015 2:27:36 PM)************************************************************/
/***** Automatically generated file (26/08/2015 09:15:07): Do not edit manually ********************/
/***** Timestamp: (26/08/2015 09:15:07)************************************************************/
/***** CS: @2309075 ******************************************************************/
@ -59,12 +59,16 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* Errata
*****************************************************************************/
#define FIX_HW_BRN_42321
#define FIX_HW_BRN_44455
#define FIX_HW_BRN_54441
/******************************************************************************
* Enhancements
*****************************************************************************/
#define HW_ERN_36400

8
drivers/gpu/rogue_m/hwdefs/km/cores/rgxcore_km_1.75.2.30.h
View File

@ -42,8 +42,8 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#ifndef _RGXCORE_KM_1_75_2_30_H_
#define _RGXCORE_KM_1_75_2_30_H_
/***** Automatically generated file (3/4/2015 2:27:33 PM): Do not edit manually ********************/
/***** Timestamp: (3/4/2015 2:27:33 PM)************************************************************/
/***** Automatically generated file (26/08/2015 09:15:07): Do not edit manually ********************/
/***** Timestamp: (26/08/2015 09:15:07)************************************************************/
/***** CS: @2309075 ******************************************************************/
@ -59,12 +59,16 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* Errata
*****************************************************************************/
#define FIX_HW_BRN_42321
#define FIX_HW_BRN_44455
#define FIX_HW_BRN_54441
/******************************************************************************
* Enhancements
*****************************************************************************/
#define HW_ERN_36400

7
drivers/gpu/rogue_m/hwdefs/km/cores/rgxcore_km_1.76.4.6.h
View File

@ -42,8 +42,8 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#ifndef _RGXCORE_KM_1_76_4_6_H_
#define _RGXCORE_KM_1_76_4_6_H_
/***** Automatically generated file (3/4/2015 2:27:34 PM): Do not edit manually ********************/
/***** Timestamp: (3/4/2015 2:27:34 PM)************************************************************/
/***** Automatically generated file (23/07/2015 09:37:59): Do not edit manually ********************/
/***** Timestamp: (23/07/2015 09:37:59)************************************************************/
/***** CS: @2318404 ******************************************************************/
@ -61,12 +61,15 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define FIX_HW_BRN_38344
#define FIX_HW_BRN_42480
#define FIX_HW_BRN_44455
#define FIX_HW_BRN_54441
/******************************************************************************
* Enhancements
*****************************************************************************/
#define HW_ERN_36400

8
drivers/gpu/rogue_m/hwdefs/km/cores/rgxcore_km_1.81.4.15.h
View File

@ -42,8 +42,8 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#ifndef _RGXCORE_KM_1_81_4_15_H_
#define _RGXCORE_KM_1_81_4_15_H_
/***** Automatically generated file (3/4/2015 2:27:36 PM): Do not edit manually ********************/
/***** Timestamp: (3/4/2015 2:27:36 PM)************************************************************/
/***** Automatically generated file (26/08/2015 09:15:07): Do not edit manually ********************/
/***** Timestamp: (26/08/2015 09:15:07)************************************************************/
/***** CS: @2373516 ******************************************************************/
@ -60,12 +60,16 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*****************************************************************************/
#define FIX_HW_BRN_38344
#define FIX_HW_BRN_42321
#define FIX_HW_BRN_44455
#define FIX_HW_BRN_54441
/******************************************************************************
* Enhancements
*****************************************************************************/
#define HW_ERN_36400

7
drivers/gpu/rogue_m/hwdefs/km/cores/rgxcore_km_1.82.4.5.h
View File

@ -42,8 +42,8 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#ifndef _RGXCORE_KM_1_82_4_5_H_
#define _RGXCORE_KM_1_82_4_5_H_
/***** Automatically generated file (3/4/2015 2:27:34 PM): Do not edit manually ********************/
/***** Timestamp: (3/4/2015 2:27:34 PM)************************************************************/
/***** Automatically generated file (26/08/2015 09:15:07): Do not edit manually ********************/
/***** Timestamp: (26/08/2015 09:15:07)************************************************************/
/***** CS: @2503111 ******************************************************************/
@ -59,12 +59,15 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* Errata
*****************************************************************************/
#define FIX_HW_BRN_44455
#define FIX_HW_BRN_54441
/******************************************************************************
* Enhancements
*****************************************************************************/
#define HW_ERN_36400

5
drivers/gpu/rogue_m/hwdefs/km/cores/rgxcore_km_12.5.1.20.h
View File

@ -42,8 +42,8 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#ifndef _RGXCORE_KM_12_5_1_20_H_
#define _RGXCORE_KM_12_5_1_20_H_
/***** Automatically generated file (4/27/2015 2:03:36 PM): Do not edit manually ********************/
/***** Timestamp: (4/27/2015 2:03:36 PM)************************************************************/
/***** Automatically generated file (23/07/2015 09:38:00): Do not edit manually ********************/
/***** Timestamp: (23/07/2015 09:38:00)************************************************************/
/***** CS: @3146507 ******************************************************************/
@ -65,6 +65,7 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
/******************************************************************************
* Enhancements
*****************************************************************************/
#define HW_ERN_36400

9
drivers/gpu/rogue_m/hwdefs/km/cores/rgxcore_km_4.29.2.51.h
View File

@ -42,8 +42,8 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#ifndef _RGXCORE_KM_4_29_2_51_H_
#define _RGXCORE_KM_4_29_2_51_H_
/***** Automatically generated file (3/2/2015 6:26:08 PM): Do not edit manually ********************/
/***** Timestamp: (3/2/2015 6:26:08 PM)************************************************************/
/***** Automatically generated file (07/09/2015 09:24:24): Do not edit manually ********************/
/***** Timestamp: (07/09/2015 09:24:24)************************************************************/
/***** CS: @2944502 ******************************************************************/
@ -59,6 +59,8 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* Errata
*****************************************************************************/
#define FIX_HW_BRN_50767
#define FIX_HW_BRN_54441
#define FIX_HW_BRN_57193
@ -66,6 +68,9 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
/******************************************************************************
* Enhancements
*****************************************************************************/
#define HW_ERN_36400
#define HW_ERN_42290
#define HW_ERN_42606

9
drivers/gpu/rogue_m/hwdefs/km/cores/rgxcore_km_4.32.2.52.h
View File

@ -42,8 +42,8 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#ifndef _RGXCORE_KM_4_32_2_52_H_
#define _RGXCORE_KM_4_32_2_52_H_
/***** Automatically generated file (3/2/2015 6:26:04 PM): Do not edit manually ********************/
/***** Timestamp: (3/2/2015 6:26:04 PM)************************************************************/
/***** Automatically generated file (07/09/2015 09:24:24): Do not edit manually ********************/
/***** Timestamp: (07/09/2015 09:24:24)************************************************************/
/***** CS: @2966609 ******************************************************************/
@ -59,6 +59,8 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* Errata
*****************************************************************************/
#define FIX_HW_BRN_50767
#define FIX_HW_BRN_54441
#define FIX_HW_BRN_57193
@ -66,6 +68,9 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
/******************************************************************************
* Enhancements
*****************************************************************************/
#define HW_ERN_36400
#define HW_ERN_42290
#define HW_ERN_42606

9
drivers/gpu/rogue_m/hwdefs/km/cores/rgxcore_km_4.40.2.51.h
View File

@ -42,8 +42,8 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#ifndef _RGXCORE_KM_4_40_2_51_H_
#define _RGXCORE_KM_4_40_2_51_H_
/***** Automatically generated file (3/2/2015 6:26:02 PM): Do not edit manually ********************/
/***** Timestamp: (3/2/2015 6:26:02 PM)************************************************************/
/***** Automatically generated file (07/09/2015 09:24:25): Do not edit manually ********************/
/***** Timestamp: (07/09/2015 09:24:25)************************************************************/
/***** CS: @3254374 ******************************************************************/
@ -59,6 +59,8 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* Errata
*****************************************************************************/
#define FIX_HW_BRN_50767
#define FIX_HW_BRN_54441
#define FIX_HW_BRN_57193
@ -66,6 +68,9 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
/******************************************************************************
* Enhancements
*****************************************************************************/
#define HW_ERN_36400
#define HW_ERN_42290
#define HW_ERN_42606

9
drivers/gpu/rogue_m/hwdefs/km/cores/rgxcore_km_4.41.2.57.h
View File

@ -42,8 +42,8 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#ifndef _RGXCORE_KM_4_41_2_57_H_
#define _RGXCORE_KM_4_41_2_57_H_
/***** Automatically generated file (3/2/2015 6:26:02 PM): Do not edit manually ********************/
/***** Timestamp: (3/2/2015 6:26:02 PM)************************************************************/
/***** Automatically generated file (07/09/2015 09:24:25): Do not edit manually ********************/
/***** Timestamp: (07/09/2015 09:24:25)************************************************************/
/***** CS: @3254338 ******************************************************************/
@ -59,6 +59,8 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* Errata
*****************************************************************************/
#define FIX_HW_BRN_50767
#define FIX_HW_BRN_54441
#define FIX_HW_BRN_57193
@ -66,6 +68,9 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
/******************************************************************************
* Enhancements
*****************************************************************************/
#define HW_ERN_36400
#define HW_ERN_42290
#define HW_ERN_42606

9
drivers/gpu/rogue_m/hwdefs/km/cores/rgxcore_km_4.42.4.53.h
View File

@ -42,8 +42,8 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#ifndef _RGXCORE_KM_4_42_4_53_H_
#define _RGXCORE_KM_4_42_4_53_H_
/***** Automatically generated file (3/2/2015 6:26:02 PM): Do not edit manually ********************/
/***** Timestamp: (3/2/2015 6:26:02 PM)************************************************************/
/***** Automatically generated file (07/09/2015 09:24:25): Do not edit manually ********************/
/***** Timestamp: (07/09/2015 09:24:25)************************************************************/
/***** CS: @3250390 ******************************************************************/
@ -59,6 +59,8 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* Errata
*****************************************************************************/
#define FIX_HW_BRN_50767
#define FIX_HW_BRN_54441
#define FIX_HW_BRN_57193
@ -66,6 +68,9 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
/******************************************************************************
* Enhancements
*****************************************************************************/
#define HW_ERN_36400
#define HW_ERN_42290
#define HW_ERN_42606

9
drivers/gpu/rogue_m/hwdefs/km/cores/rgxcore_km_4.43.6.62.h
View File

@ -42,8 +42,8 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#ifndef _RGXCORE_KM_4_43_6_62_H_
#define _RGXCORE_KM_4_43_6_62_H_
/***** Automatically generated file (3/2/2015 6:26:02 PM): Do not edit manually ********************/
/***** Timestamp: (3/2/2015 6:26:02 PM)************************************************************/
/***** Automatically generated file (07/09/2015 09:24:25): Do not edit manually ********************/
/***** Timestamp: (07/09/2015 09:24:25)************************************************************/
/***** CS: @3253129 ******************************************************************/
@ -59,6 +59,8 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* Errata
*****************************************************************************/
#define FIX_HW_BRN_50767
#define FIX_HW_BRN_54441
#define FIX_HW_BRN_57193
@ -66,6 +68,9 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
/******************************************************************************
* Enhancements
*****************************************************************************/
#define HW_ERN_36400
#define HW_ERN_42290
#define HW_ERN_42606

7
drivers/gpu/rogue_m/hwdefs/km/cores/rgxcore_km_5.11.1.46.h
View File

@ -42,8 +42,8 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#ifndef _RGXCORE_KM_5_11_1_46_H_
#define _RGXCORE_KM_5_11_1_46_H_
/***** Automatically generated file (4/2/2015 11:53:03 AM): Do not edit manually ********************/
/***** Timestamp: (4/2/2015 11:53:03 AM)************************************************************/
/***** Automatically generated file (26/08/2015 09:15:10): Do not edit manually ********************/
/***** Timestamp: (26/08/2015 09:15:10)************************************************************/
/***** CS: @3485232 ******************************************************************/
@ -59,13 +59,14 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* Errata
*****************************************************************************/
#define FIX_HW_BRN_42480
#define FIX_HW_BRN_42321
/******************************************************************************
* Enhancements
*****************************************************************************/
#define HW_ERN_36400

5
drivers/gpu/rogue_m/hwdefs/km/cores/rgxcore_km_5.9.1.46.h
View File

@ -42,8 +42,8 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#ifndef _RGXCORE_KM_5_9_1_46_H_
#define _RGXCORE_KM_5_9_1_46_H_
/***** Automatically generated file (3/4/2015 2:27:37 PM): Do not edit manually ********************/
/***** Timestamp: (3/4/2015 2:27:37 PM)************************************************************/
/***** Automatically generated file (26/08/2015 09:15:08): Do not edit manually ********************/
/***** Timestamp: (26/08/2015 09:15:08)************************************************************/
/***** CS: @2967148 ******************************************************************/
@ -66,6 +66,7 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
/******************************************************************************
* Enhancements
*****************************************************************************/
#define HW_ERN_36400

11
drivers/gpu/rogue_m/hwdefs/km/cores/rgxcore_km_8.21.2.34.h
View File

@ -42,8 +42,8 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#ifndef _RGXCORE_KM_8_21_2_34_H_
#define _RGXCORE_KM_8_21_2_34_H_
/***** Automatically generated file (21/04/2015 18:47:55): Do not edit manually ********************/
/***** Timestamp: (21/04/2015 18:47:55)************************************************************/
/***** Automatically generated file (23/07/2015 09:38:01): Do not edit manually ********************/
/***** Timestamp: (23/07/2015 09:38:01)************************************************************/
/***** CS: @3480967 ******************************************************************/
@ -59,13 +59,20 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* Errata
*****************************************************************************/
#define FIX_HW_BRN_54441
#define FIX_HW_BRN_55091
/******************************************************************************
* Enhancements
*****************************************************************************/
#define HW_ERN_36400
#define HW_ERN_42290
#define HW_ERN_42606
#define HW_ERN_45914
#define HW_ERN_46066
#define HW_ERN_47025

11
drivers/gpu/rogue_m/hwdefs/km/cores/rgxcore_km_8.41.4.38.h
View File

@ -42,8 +42,8 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#ifndef _RGXCORE_KM_8_41_4_38_H_
#define _RGXCORE_KM_8_41_4_38_H_
/***** Automatically generated file (5/12/2015 5:46:10 AM): Do not edit manually ********************/
/***** Timestamp: (5/12/2015 5:46:10 AM)************************************************************/
/***** Automatically generated file (23/07/2015 09:38:02): Do not edit manually ********************/
/***** Timestamp: (23/07/2015 09:38:02)************************************************************/
/***** CS: @3498807 ******************************************************************/
@ -59,13 +59,20 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* Errata
*****************************************************************************/
#define FIX_HW_BRN_54441
#define FIX_HW_BRN_55091
/******************************************************************************
* Enhancements
*****************************************************************************/
#define HW_ERN_36400
#define HW_ERN_42290
#define HW_ERN_42606
#define HW_ERN_45914
#define HW_ERN_46066
#define HW_ERN_47025

15
drivers/gpu/rogue_m/include/pvrversion.h
View File

@ -60,6 +60,13 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* Merge 1.5_ED3653583 DDK code.
* M 1.28:
* Merge 1.5_ED3776568 DDK code.
* M 1.29
* 1. Reopen bEnableRDPowIsland since it doesn't appear splash screen when click the drawerbutton.
* 2. Don't set PVR_ANDROID_HAS_SET_BUFFERS_DATASPACE by default.
* 3. Remove hGPUUtilLock to avoid dead lock.
* 4. Get raw ion_device by IonDevAcquire.
* M 1.31
* 1. Merge 1.5_ED3830101 DDK code.
*/
#define PVR_STR(X) #X
@ -70,7 +77,7 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define PVRVERSION_FAMILY "rogueddk"
#define PVRVERSION_BRANCHNAME "1.5"
#define PVRVERSION_BUILD 3776568
#define PVRVERSION_BUILD 3830101
#define PVRVERSION_BSCONTROL "Rogue_DDK_Android"
#define PVRVERSION_STRING "Rogue_DDK_Android rogueddk 1.5@" PVR_STR2(PVRVERSION_BUILD)
@ -78,8 +85,8 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define COPYRIGHT_TXT "Copyright (c) Imagination Technologies Ltd. All Rights Reserved."
#define PVRVERSION_BUILD_HI 377
#define PVRVERSION_BUILD_LO 6568
#define PVRVERSION_BUILD_HI 383
#define PVRVERSION_BUILD_LO 101
#define PVRVERSION_STRING_NUMERIC PVR_STR2(PVRVERSION_MAJ) "." PVR_STR2(PVRVERSION_MIN) "." PVR_STR2(PVRVERSION_BUILD_HI) "." PVR_STR2(PVRVERSION_BUILD_LO)
#define PVRVERSION_PACK(MAJ,MIN) ((((MAJ)&0xFFFF) << 16) | (((MIN)&0xFFFF) << 0))
@ -87,5 +94,5 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define PVRVERSION_UNPACK_MIN(VERSION) (((VERSION) >> 0) & 0xFFFF)
//chenli:define rockchip version
#define RKVERSION "KM M 1.28"
#define RKVERSION "Rogue M 1.31"
#endif /* _PVRVERSION_H_ */

3
drivers/gpu/rogue_m/include/sync_external.h
View File

@ -49,6 +49,9 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define SYNC_MAX_CLASS_NAME_LEN 32
#define PVRSRV_MAX_SYNC_PRIMS 32 /*!< number of sync primitives in operations */
typedef IMG_HANDLE SYNC_BRIDGE_HANDLE;
typedef struct SYNC_PRIM_CONTEXT *PSYNC_PRIM_CONTEXT;
typedef struct _SYNC_OP_COOKIE_ *PSYNC_OP_COOKIE;

15
drivers/gpu/rogue_m/services/server/common/mmu_common.c
View File

@ -1062,14 +1062,14 @@ static PVRSRV_ERROR _SetupPxE(MMU_CONTEXT *psMMUContext,
IMG_DEVMEM_OFFSET_T uiSymbolicAddrOffset,
#endif
MMU_FLAGS_T uiProtFlags,
IMG_UINT8 uiLog2PageSize)
IMG_UINT32 uiLog2PageSize)
{
PVRSRV_DEVICE_NODE *psDevNode = psMMUContext->psDevNode;
MMU_MEMORY_DESC *psMemDesc = &psLevel->sMemDesc;
PVRSRV_ERROR eError;
IMG_UINT32 (*pfnDerivePxEProt4)(IMG_UINT32);
IMG_UINT64 (*pfnDerivePxEProt8)(IMG_UINT32, IMG_UINT8);
IMG_UINT64 (*pfnDerivePxEProt8)(IMG_UINT32, IMG_UINT32);
if (!psDevPAddr)
{
@ -1283,7 +1283,6 @@ static IMG_BOOL _MMU_FreeLevel(MMU_CONTEXT *psMMUContext,
const MMU_PxE_CONFIG *psConfig = apsConfig[uiThisLevel];
IMG_UINT32 i;
IMG_BOOL bFreed = IMG_FALSE;
IMG_UINT8 uiLog2PageSize;
/* Sanity check */
PVR_ASSERT(*pui32CurrentLevel < MMU_MAX_LEVEL);
@ -1343,9 +1342,7 @@ static IMG_BOOL _MMU_FreeLevel(MMU_CONTEXT *psMMUContext,
if (aeMMULevel[uiThisLevel] != MMU_LEVEL_1)
{
PVRSRV_ERROR eError;
/* Take the page size from the page table configs.
Calculate array entry for PT config dependent on max MMU level */
uiLog2PageSize = apsConfig[MMU_MAX_LEVEL-1]->uiLog2Align;
/* Un-wire the entry */
eError = _SetupPxE(psMMUContext,
psLevel,
@ -1359,7 +1356,7 @@ static IMG_BOOL _MMU_FreeLevel(MMU_CONTEXT *psMMUContext,
0, /* Only required for data page */
#endif
MMU_PROTFLAGS_INVALID,
uiLog2PageSize);
GET_LOG2_PAGESIZE());
PVR_ASSERT(eError == PVRSRV_OK);
}
@ -1480,7 +1477,6 @@ static PVRSRV_ERROR _MMU_AllocLevel(MMU_CONTEXT *psMMUContext,
IMG_UINT32 uiNextEndIndex;
IMG_BOOL bNextFirst;
IMG_BOOL bNextLast;
IMG_UINT8 uiLog2PageSize;
/* If there is already a next Px level existing, do not allocate it */
if (!psLevel->apsNextLevel[i])
@ -1520,7 +1516,6 @@ static PVRSRV_ERROR _MMU_AllocLevel(MMU_CONTEXT *psMMUContext,
goto e0;
}
uiLog2PageSize = apsConfig[MMU_MAX_LEVEL-1]->uiLog2Align;
/* Wire up the entry */
eError = _SetupPxE(psMMUContext,
psLevel,
@ -1534,7 +1529,7 @@ static PVRSRV_ERROR _MMU_AllocLevel(MMU_CONTEXT *psMMUContext,
0, /* Only required for data page */
#endif
0,
uiLog2PageSize);
GET_LOG2_PAGESIZE());
if (eError != PVRSRV_OK)
{

6
drivers/gpu/rogue_m/services/server/common/pmr.c
View File

@ -433,6 +433,12 @@ _PMRCreate(PMR_SIZE_T uiLogicalSize,
OSDivide64(uiChunkSize, (1<< uiLog2ContiguityGuarantee), &ui32Remainder);
if (ui32Remainder)
{
PVR_DPF((PVR_DBG_ERROR,
"%s: Bad chunk size, must me a multiple of the contiguity "
"(uiChunkSize = 0x%llx, uiLog2ContiguityGuarantee = %u)",
__FUNCTION__,
(unsigned long long) uiChunkSize,
uiLog2ContiguityGuarantee));
return PVRSRV_ERROR_PMR_BAD_CHUNK_SIZE;
}

6
drivers/gpu/rogue_m/services/server/common/power.c
View File

@ -666,6 +666,12 @@ PVRSRV_ERROR PVRSRVSetDevicePowerStateKM(IMG_UINT32 ui32DeviceIndex,
PVRSRV_DATA* psPVRSRVData = PVRSRVGetPVRSRVData();
PVRSRV_DEV_POWER_STATE eOldPowerState;
if (PVRSRV_SYS_POWER_STATE_ON != psPVRSRVData->eCurrentPowerState)
{
PVR_DPF((PVR_DBG_ERROR, "PVRSRVSetDevicePowerStateKM: System power state is not ON"));
return PVRSRV_ERROR_DEVICE_POWER_CHANGE_DENIED;
}
eError = PVRSRVGetDevicePowerState(ui32DeviceIndex, &eOldPowerState);
if (eError != PVRSRV_OK)
{

205
drivers/gpu/rogue_m/services/server/common/process_stats.c
View File

@ -160,10 +160,14 @@ static IMG_CHAR* pszProcessStatFmt[PVRSRV_PROCESS_STAT_TYPE_COUNT] = {
"FreeListGrowRequestsByFirmware %10d\n", /* PVRSRV_PROCESS_STAT_TYPE_FREELIST_GROW_REQS_BY_FW */
"FreeListInitialPages %10d\n", /* PVRSRV_PROCESS_STAT_TYPE_FREELIST_PAGES_INIT */
"FreeListMaxPages %10d\n", /* PVRSRV_PROCESS_STAT_TYPE_FREELIST_MAX_PAGES */
#if !defined(PVR_DISABLE_KMALLOC_MEMSTATS)
"MemoryUsageKMalloc %10d\n", /* PVRSRV_STAT_TYPE_KMALLOC */
"MemoryUsageKMallocMax %10d\n", /* PVRSRV_STAT_TYPE_MAX_KMALLOC */
"MemoryUsageVMalloc %10d\n", /* PVRSRV_STAT_TYPE_VMALLOC */
"MemoryUsageVMallocMax %10d\n", /* PVRSRV_STAT_TYPE_MAX_VMALLOC */
#else
"","","","", /* Empty strings if these stats are not logged */
#endif
"MemoryUsageAllocPTMemoryUMA %10d\n", /* PVRSRV_STAT_TYPE_ALLOC_PAGES_PT_UMA */
"MemoryUsageAllocPTMemoryUMAMax %10d\n", /* PVRSRV_STAT_TYPE_MAX_ALLOC_PAGES_PT_UMA */
"MemoryUsageVMapPTUMA %10d\n", /* PVRSRV_STAT_TYPE_VMAP_PT_UMA */
@ -186,6 +190,14 @@ static IMG_CHAR* pszProcessStatFmt[PVRSRV_PROCESS_STAT_TYPE_COUNT] = {
"MemoryUsageTotalMapMax %10d\n", /* PVRSRV_PROCESS_STAT_TYPE_MAX_TOTAL_MAP */
};
/* structure used in hash table to track vmalloc statistic entries */
typedef struct{
IMG_SIZE_T uiSizeInBytes;
IMG_PID uiPid;
}_PVR_STATS_VMALLOC_HASH_ENTRY;
/* Function used internally to decrement per-process vmalloc statistic entries */
static IMG_VOID _StatsDecrMemVAllocStat(_PVR_STATS_VMALLOC_HASH_ENTRY *psVmallocHashEntry);
/*
* Functions for printing the information stored...
@ -1093,6 +1105,7 @@ static void _decrease_global_stat(PVRSRV_MEM_ALLOC_TYPE eAllocType,
{
switch (eAllocType)
{
#if !defined(PVR_DISABLE_KMALLOC_MEMSTATS)
case PVRSRV_MEM_ALLOC_TYPE_KMALLOC:
DECREASE_GLOBAL_STAT_VALUE(gsGlobalStats.ui32MemoryUsageKMalloc, uiBytes);
break;
@ -1100,7 +1113,11 @@ static void _decrease_global_stat(PVRSRV_MEM_ALLOC_TYPE eAllocType,
case PVRSRV_MEM_ALLOC_TYPE_VMALLOC:
DECREASE_GLOBAL_STAT_VALUE(gsGlobalStats.ui32MemoryUsageVMalloc, uiBytes);
break;
#else
case PVRSRV_MEM_ALLOC_TYPE_KMALLOC:
case PVRSRV_MEM_ALLOC_TYPE_VMALLOC:
break;
#endif
case PVRSRV_MEM_ALLOC_TYPE_ALLOC_PAGES_PT_UMA:
DECREASE_GLOBAL_STAT_VALUE(gsGlobalStats.ui32MemoryUsageAllocPTMemoryUMA, uiBytes);
break;
@ -1144,6 +1161,7 @@ static void _increase_global_stat(PVRSRV_MEM_ALLOC_TYPE eAllocType,
{
switch (eAllocType)
{
#if !defined(PVR_DISABLE_KMALLOC_MEMSTATS)
case PVRSRV_MEM_ALLOC_TYPE_KMALLOC:
INCREASE_GLOBAL_STAT_VALUE(gsGlobalStats.ui32MemoryUsageKMalloc, uiBytes);
break;
@ -1151,7 +1169,11 @@ static void _increase_global_stat(PVRSRV_MEM_ALLOC_TYPE eAllocType,
case PVRSRV_MEM_ALLOC_TYPE_VMALLOC:
INCREASE_GLOBAL_STAT_VALUE(gsGlobalStats.ui32MemoryUsageVMalloc, uiBytes);
break;
#else
case PVRSRV_MEM_ALLOC_TYPE_KMALLOC:
case PVRSRV_MEM_ALLOC_TYPE_VMALLOC:
break;
#endif
case PVRSRV_MEM_ALLOC_TYPE_ALLOC_PAGES_PT_UMA:
INCREASE_GLOBAL_STAT_VALUE(gsGlobalStats.ui32MemoryUsageAllocPTMemoryUMA, uiBytes);
break;
@ -1395,7 +1417,11 @@ PVRSRVStatsAddMemAllocRecord(PVRSRV_MEM_ALLOC_TYPE eAllocType,
*/
/* Allocate the memory record... */
#if defined(__linux__)
psRecord = OSAllocMemstatMem(sizeof(PVRSRV_MEM_ALLOC_REC));
#else
psRecord = OSAllocMem(sizeof(PVRSRV_MEM_ALLOC_REC));
#endif
if (psRecord == IMG_NULL)
{
return;
@ -1434,7 +1460,11 @@ PVRSRVStatsAddMemAllocRecord(PVRSRV_MEM_ALLOC_TYPE eAllocType,
OSLockRelease(psLinkedListLock);
if (psRecord != IMG_NULL)
{
#if defined(__linux__)
OSFreeMemstatMem(psRecord);
#else
OSFreeMem(psRecord);
#endif
}
return;
}
@ -1449,6 +1479,7 @@ PVRSRVStatsAddMemAllocRecord(PVRSRV_MEM_ALLOC_TYPE eAllocType,
/* Update the memory watermarks... */
switch (eAllocType)
{
#if !defined(PVR_DISABLE_KMALLOC_MEMSTATS)
case PVRSRV_MEM_ALLOC_TYPE_KMALLOC:
{
if (psRecord != IMG_NULL)
@ -1476,7 +1507,11 @@ PVRSRVStatsAddMemAllocRecord(PVRSRV_MEM_ALLOC_TYPE eAllocType,
INCREASE_STAT_VALUE(psProcessStats, PVRSRV_PROCESS_STAT_TYPE_VMALLOC, uiBytes);
}
break;
#else
case PVRSRV_MEM_ALLOC_TYPE_KMALLOC:
case PVRSRV_MEM_ALLOC_TYPE_VMALLOC:
break;
#endif
case PVRSRV_MEM_ALLOC_TYPE_ALLOC_PAGES_PT_UMA:
{
if (psRecord != IMG_NULL)
@ -1720,6 +1755,7 @@ PVRSRVStatsRemoveMemAllocRecord(PVRSRV_MEM_ALLOC_TYPE eAllocType,
switch (eAllocType)
{
#if !defined(PVR_DISABLE_KMALLOC_MEMSTATS)
case PVRSRV_MEM_ALLOC_TYPE_KMALLOC:
{
DECREASE_STAT_VALUE(psProcessStats, PVRSRV_PROCESS_STAT_TYPE_KMALLOC, psRecord->uiBytes);
@ -1731,7 +1767,11 @@ PVRSRVStatsRemoveMemAllocRecord(PVRSRV_MEM_ALLOC_TYPE eAllocType,
DECREASE_STAT_VALUE(psProcessStats, PVRSRV_PROCESS_STAT_TYPE_VMALLOC, psRecord->uiBytes);
}
break;
#else
case PVRSRV_MEM_ALLOC_TYPE_KMALLOC:
case PVRSRV_MEM_ALLOC_TYPE_VMALLOC:
break;
#endif
case PVRSRV_MEM_ALLOC_TYPE_ALLOC_PAGES_PT_UMA:
{
DECREASE_STAT_VALUE(psProcessStats, PVRSRV_PROCESS_STAT_TYPE_ALLOC_PAGES_PT_UMA, psRecord->uiBytes);
@ -1800,7 +1840,11 @@ psProcessStats->i32StatValue[PVRSRV_PROCESS_STAT_TYPE_TOTAL_MAP] = psProcessStat
*/
if (psRecord != IMG_NULL)
{
#if defined(__linux__)
OSFreeMemstatMem(psRecord);
#else
OSFreeMem(psRecord);
#endif
}
#else
PVR_UNREFERENCED_PARAMETER(eAllocType);
@ -1813,7 +1857,8 @@ PVRSRVStatsIncrMemAllocStatAndTrack(PVRSRV_MEM_ALLOC_TYPE eAllocType,
IMG_SIZE_T uiBytes,
IMG_UINT64 uiCpuVAddr)
{
IMG_BOOL bRes;
IMG_BOOL bRes = IMG_FALSE;
_PVR_STATS_VMALLOC_HASH_ENTRY *psNewVmallocHashEntry = NULL;
if (!bProcessStatsInitialised || (gpsVmallocSizeHashTable == NULL) )
{
@ -1821,15 +1866,35 @@ PVRSRVStatsIncrMemAllocStatAndTrack(PVRSRV_MEM_ALLOC_TYPE eAllocType,
}
OSLockAcquire(gpsVmallocSizeHashTableLock);
bRes = HASH_Insert(gpsVmallocSizeHashTable, uiCpuVAddr, uiBytes);
OSLockRelease(gpsVmallocSizeHashTableLock);
if (bRes)
/* Alloc untracked memory for the new hash table entry */
#if defined(__linux__)
psNewVmallocHashEntry = OSAllocMemstatMem(sizeof(*psNewVmallocHashEntry));
#else
psNewVmallocHashEntry = OSAllocMem(sizeof(*psNewVmallocHashEntry));
#endif
if (psNewVmallocHashEntry)
{
PVRSRVStatsIncrMemAllocStat(eAllocType, uiBytes);
/* Fill-in the size of the vmalloc and PID of the allocating process */
psNewVmallocHashEntry->uiSizeInBytes = uiBytes;
psNewVmallocHashEntry->uiPid = OSGetCurrentProcessID();
/* Insert address of the new struct into the hash table */
bRes = HASH_Insert(gpsVmallocSizeHashTable, uiCpuVAddr, (uintptr_t)psNewVmallocHashEntry);
}
OSLockRelease(gpsVmallocSizeHashTableLock);
if (psNewVmallocHashEntry)
{
if (bRes)
{
PVRSRVStatsIncrMemAllocStat(eAllocType, uiBytes);
}
else
{
PVR_DPF((PVR_DBG_ERROR, "*** %s : @ line %d HASH_Insert() failed!!", __FUNCTION__, __LINE__));
}
}
else
{
PVR_DPF((PVR_DBG_ERROR, "*** %s : @ line %d HASH_Insert() failed!!", __FUNCTION__, __LINE__));
PVR_DPF((PVR_DBG_ERROR, "*** %s : @ line %d Failed to alloc memory for psNewVmallocHashEntry!!", __FUNCTION__, __LINE__));
}
}
@ -1874,6 +1939,7 @@ PVRSRVStatsIncrMemAllocStat(PVRSRV_MEM_ALLOC_TYPE eAllocType,
/* Update the memory watermarks... */
switch (eAllocType)
{
#if !defined(PVR_DISABLE_KMALLOC_MEMSTATS)
case PVRSRV_MEM_ALLOC_TYPE_KMALLOC:
{
INCREASE_STAT_VALUE(psProcessStats, PVRSRV_PROCESS_STAT_TYPE_KMALLOC, uiBytes);
@ -1885,7 +1951,11 @@ PVRSRVStatsIncrMemAllocStat(PVRSRV_MEM_ALLOC_TYPE eAllocType,
INCREASE_STAT_VALUE(psProcessStats, PVRSRV_PROCESS_STAT_TYPE_VMALLOC, uiBytes);
}
break;
#else
case PVRSRV_MEM_ALLOC_TYPE_KMALLOC:
case PVRSRV_MEM_ALLOC_TYPE_VMALLOC:
break;
#endif
case PVRSRV_MEM_ALLOC_TYPE_ALLOC_PAGES_PT_UMA:
{
INCREASE_STAT_VALUE(psProcessStats, PVRSRV_PROCESS_STAT_TYPE_ALLOC_PAGES_PT_UMA, uiBytes);
@ -1951,11 +2021,68 @@ PVRSRVStatsIncrMemAllocStat(PVRSRV_MEM_ALLOC_TYPE eAllocType,
OSLockRelease(psLinkedListLock);
}
void
PVRSRVStatsDecrMemKAllocStat(IMG_SIZE_T uiBytes,
IMG_PID decrPID)
{
#if !defined(PVR_DISABLE_KMALLOC_MEMSTATS)
PVRSRV_PROCESS_STATS* psProcessStats;
/* Don't do anything if we are not initialised or we are shutting down! */
if (!bProcessStatsInitialised)
{
return;
}
_decrease_global_stat(PVRSRV_MEM_ALLOC_TYPE_KMALLOC, uiBytes);
OSLockAcquire(psLinkedListLock);
psProcessStats = _FindProcessStats(decrPID);
if (psProcessStats != NULL)
{
/* Decrement the kmalloc memory stat... */
DECREASE_STAT_VALUE(psProcessStats, PVRSRV_PROCESS_STAT_TYPE_KMALLOC, uiBytes);
}
OSLockRelease(psLinkedListLock);
#endif
}
static void
_StatsDecrMemVAllocStat(_PVR_STATS_VMALLOC_HASH_ENTRY *psVmallocHashEntry)
{
#if !defined(PVR_DISABLE_KMALLOC_MEMSTATS)
PVRSRV_PROCESS_STATS* psProcessStats;
/* Don't do anything if we are not initialised or we are shutting down! */
if (!bProcessStatsInitialised)
{
return;
}
_decrease_global_stat(PVRSRV_MEM_ALLOC_TYPE_VMALLOC, psVmallocHashEntry->uiSizeInBytes);
OSLockAcquire(psLinkedListLock);
psProcessStats = _FindProcessStats(psVmallocHashEntry->uiPid);
if (psProcessStats != NULL)
{
/* Decrement the kmalloc memory stat... */
DECREASE_STAT_VALUE(psProcessStats, PVRSRV_PROCESS_STAT_TYPE_VMALLOC, psVmallocHashEntry->uiSizeInBytes);
}
OSLockRelease(psLinkedListLock);
#endif
}
IMG_VOID
PVRSRVStatsDecrMemAllocStatAndUntrack(PVRSRV_MEM_ALLOC_TYPE eAllocType,
IMG_UINT64 uiCpuVAddr)
{
IMG_SIZE_T uiBytes;
_PVR_STATS_VMALLOC_HASH_ENTRY *psVmallocHashEntry = NULL;
if (!bProcessStatsInitialised || (gpsVmallocSizeHashTable == NULL) )
{
@ -1963,10 +2090,17 @@ PVRSRVStatsDecrMemAllocStatAndUntrack(PVRSRV_MEM_ALLOC_TYPE eAllocType,
}
OSLockAcquire(gpsVmallocSizeHashTableLock);
uiBytes = HASH_Remove(gpsVmallocSizeHashTable, uiCpuVAddr);
psVmallocHashEntry = (_PVR_STATS_VMALLOC_HASH_ENTRY *)HASH_Remove(gpsVmallocSizeHashTable, uiCpuVAddr);
if (psVmallocHashEntry)
{
_StatsDecrMemVAllocStat(psVmallocHashEntry);
#if defined(__linux__)
OSFreeMemstatMem(psVmallocHashEntry);
#else
OSFreeMem(psVmallocHashEntry);
#endif
}
OSLockRelease(gpsVmallocSizeHashTableLock);
PVRSRVStatsDecrMemAllocStat(eAllocType, uiBytes);
}
IMG_VOID
@ -2009,6 +2143,7 @@ PVRSRVStatsDecrMemAllocStat(PVRSRV_MEM_ALLOC_TYPE eAllocType,
/* Update the memory watermarks... */
switch (eAllocType)
{
#if !defined(PVR_DISABLE_KMALLOC_MEMSTATS)
case PVRSRV_MEM_ALLOC_TYPE_KMALLOC:
{
DECREASE_STAT_VALUE(psProcessStats, PVRSRV_PROCESS_STAT_TYPE_KMALLOC, uiBytes);
@ -2020,7 +2155,11 @@ PVRSRVStatsDecrMemAllocStat(PVRSRV_MEM_ALLOC_TYPE eAllocType,
DECREASE_STAT_VALUE(psProcessStats, PVRSRV_PROCESS_STAT_TYPE_VMALLOC, uiBytes);
}
break;
#else
case PVRSRV_MEM_ALLOC_TYPE_KMALLOC:
case PVRSRV_MEM_ALLOC_TYPE_VMALLOC:
break;
#endif
case PVRSRV_MEM_ALLOC_TYPE_ALLOC_PAGES_PT_UMA:
{
DECREASE_STAT_VALUE(psProcessStats, PVRSRV_PROCESS_STAT_TYPE_ALLOC_PAGES_PT_UMA, uiBytes);
@ -2315,11 +2454,19 @@ MemStatsPrintElements(IMG_PVOID pvFilePtr,
while (psRecord != IMG_NULL)
{
IMG_BOOL bPrintStat = IMG_TRUE;
switch (psRecord->eAllocType)
{
#if !defined(PVR_DISABLE_KMALLOC_MEMSTATS)
case PVRSRV_MEM_ALLOC_TYPE_KMALLOC: pfnOSStatsPrintf(pvFilePtr, "KMALLOC "); break;
case PVRSRV_MEM_ALLOC_TYPE_VMALLOC: pfnOSStatsPrintf(pvFilePtr, "VMALLOC "); break;
case PVRSRV_MEM_ALLOC_TYPE_ALLOC_PAGES_PT_LMA: pfnOSStatsPrintf(pvFilePtr, "ALLOC_PAGES_PT_LMA "); break;
#else
case PVRSRV_MEM_ALLOC_TYPE_KMALLOC:
case PVRSRV_MEM_ALLOC_TYPE_VMALLOC:
bPrintStat = IMG_FALSE; break;
#endif
case PVRSRV_MEM_ALLOC_TYPE_ALLOC_PAGES_PT_UMA: pfnOSStatsPrintf(pvFilePtr, "ALLOC_PAGES_PT_UMA "); break;
case PVRSRV_MEM_ALLOC_TYPE_IOREMAP_PT_LMA: pfnOSStatsPrintf(pvFilePtr, "IOREMAP_PT_LMA "); break;
case PVRSRV_MEM_ALLOC_TYPE_VMAP_PT_UMA: pfnOSStatsPrintf(pvFilePtr, "VMAP_PT_UMA "); break;
@ -2329,19 +2476,21 @@ MemStatsPrintElements(IMG_PVOID pvFilePtr,
default: pfnOSStatsPrintf(pvFilePtr, "INVALID "); break;
}
for (ui32ItemNumber = 0; ui32ItemNumber < ui32VAddrFields; ui32ItemNumber++)
if (bPrintStat)
{
pfnOSStatsPrintf(pvFilePtr, "%08x", *(((IMG_UINT32*) &psRecord->pvCpuVAddr) + ui32VAddrFields - ui32ItemNumber - 1));
for (ui32ItemNumber = 0; ui32ItemNumber < ui32VAddrFields; ui32ItemNumber++)
{
pfnOSStatsPrintf(pvFilePtr, "%08x", *(((IMG_UINT32*) &psRecord->pvCpuVAddr) + ui32VAddrFields - ui32ItemNumber - 1));
}
pfnOSStatsPrintf(pvFilePtr, " ");
for (ui32ItemNumber = 0; ui32ItemNumber < ui32PAddrFields; ui32ItemNumber++)
{
pfnOSStatsPrintf(pvFilePtr, "%08x", *(((IMG_UINT32*) &psRecord->sCpuPAddr.uiAddr) + ui32PAddrFields - ui32ItemNumber - 1));
}
pfnOSStatsPrintf(pvFilePtr, " %u\n", psRecord->uiBytes);
}
pfnOSStatsPrintf(pvFilePtr, " ");
for (ui32ItemNumber = 0; ui32ItemNumber < ui32PAddrFields; ui32ItemNumber++)
{
pfnOSStatsPrintf(pvFilePtr, "%08x", *(((IMG_UINT32*) &psRecord->sCpuPAddr.uiAddr) + ui32PAddrFields - ui32ItemNumber - 1));
}
pfnOSStatsPrintf(pvFilePtr, " %u\n", psRecord->uiBytes);
/* Move to next record... */
psRecord = psRecord->psNext;
}
@ -2485,10 +2634,12 @@ IMG_VOID GlobalStatsPrintElements(IMG_PVOID pvFilePtr,
if (pfnOSGetStatsPrintf != IMG_NULL)
{
#if !defined(PVR_DISABLE_KMALLOC_MEMSTATS)
pfnOSGetStatsPrintf(pvFilePtr, "MemoryUsageKMalloc %10d\n", gsGlobalStats.ui32MemoryUsageKMalloc);
pfnOSGetStatsPrintf(pvFilePtr, "MemoryUsageKMallocMax %10d\n", gsGlobalStats.ui32MemoryUsageKMallocMax);
pfnOSGetStatsPrintf(pvFilePtr, "MemoryUsageVMalloc %10d\n", gsGlobalStats.ui32MemoryUsageVMalloc);
pfnOSGetStatsPrintf(pvFilePtr, "MemoryUsageVMallocMax %10d\n", gsGlobalStats.ui32MemoryUsageVMallocMax);
#endif
pfnOSGetStatsPrintf(pvFilePtr, "MemoryUsageAllocPTMemoryUMA %10d\n", gsGlobalStats.ui32MemoryUsageAllocPTMemoryUMA);
pfnOSGetStatsPrintf(pvFilePtr, "MemoryUsageAllocPTMemoryUMAMax %10d\n", gsGlobalStats.ui32MemoryUsageAllocPTMemoryUMAMax);
pfnOSGetStatsPrintf(pvFilePtr, "MemoryUsageVMapPTUMA %10d\n", gsGlobalStats.ui32MemoryUsageVMapPTUMA);

2
drivers/gpu/rogue_m/services/server/common/srvcore.c
View File

@ -408,7 +408,7 @@ PVRSRVHWOpTimeoutKM(IMG_VOID)
OSPanic();
#endif
PVR_LOG(("HW operation timeout, dump server info"));
PVRSRVDebugRequest(DEBUG_REQUEST_VERBOSITY_LOW,IMG_NULL);
PVRSRVDebugRequest(DEBUG_REQUEST_VERBOSITY_MEDIUM, IMG_NULL);
return PVRSRV_OK;
}

13
drivers/gpu/rogue_m/services/server/common/sync_server.c
View File

@ -235,13 +235,17 @@ SyncPrimitiveBlockToFWAddr(SYNC_PRIMITIVE_BLOCK *psSyncPrimBlock,
static PVRSRV_ERROR SyncAddrListGrow(SYNC_ADDR_LIST *psList, IMG_UINT32 ui32NumSyncs)
{
PVR_ASSERT(ui32NumSyncs <= PVRSRV_MAX_SYNC_PRIMS);
if(ui32NumSyncs > psList->ui32NumSyncs)
{
OSFreeMem(psList->pasFWAddrs);
psList->pasFWAddrs = OSAllocMem(sizeof(PRGXFWIF_UFO_ADDR) * ui32NumSyncs);
if(psList->pasFWAddrs == IMG_NULL)
{
return PVRSRV_ERROR_OUT_OF_MEMORY;
psList->pasFWAddrs = OSAllocMem(sizeof(PRGXFWIF_UFO_ADDR) * PVRSRV_MAX_SYNC_PRIMS);
if(psList->pasFWAddrs == NULL)
{
return PVRSRV_ERROR_OUT_OF_MEMORY;
}
}
psList->ui32NumSyncs = ui32NumSyncs;
@ -264,6 +268,7 @@ IMG_VOID
SyncAddrListInit(SYNC_ADDR_LIST *psList)
{
psList->ui32NumSyncs = 0;
psList->pasFWAddrs = NULL;
}
/*!
@ -279,7 +284,7 @@ SyncAddrListInit(SYNC_ADDR_LIST *psList)
IMG_VOID
SyncAddrListDeinit(SYNC_ADDR_LIST *psList)
{
if(psList->ui32NumSyncs != 0)
if(psList->pasFWAddrs != NULL)
{
OSFreeMem(psList->pasFWAddrs);
}

34
drivers/gpu/rogue_m/services/server/devices/rgx/rgxccb.c
View File

@ -93,6 +93,27 @@ struct _RGX_CLIENT_CCB_ {
#endif
};
IMG_EXPORT PVRSRV_ERROR RGXCCBPDumpDrainCCB(RGX_CLIENT_CCB *psClientCCB,
IMG_BOOL bPDumpContinuous)
{
IMG_UINT32 ui32PDumpFlags;
ui32PDumpFlags = bPDumpContinuous ? PDUMP_FLAGS_CONTINUOUS : 0;
PDUMPCOMMENTWITHFLAGS(ui32PDumpFlags,
"cCCB(%s@%p): Draining CCB rgxfw_roff == woff (%d)",
psClientCCB->szName,
psClientCCB,
psClientCCB->ui32LastPDumpWriteOffset);
return DevmemPDumpDevmemPol32(psClientCCB->psClientCCBCtrlMemDesc,
offsetof(RGXFWIF_CCCB_CTL, ui32ReadOffset),
psClientCCB->ui32LastPDumpWriteOffset,
0xffffffff,
PDUMP_POLL_OPERATOR_EQUAL,
ui32PDumpFlags);
}
static PVRSRV_ERROR _RGXCCBPDumpTransition(IMG_PVOID *pvData, IMG_BOOL bInto, IMG_BOOL bContinuous)
{
RGX_CLIENT_CCB *psClientCCB = (RGX_CLIENT_CCB *) pvData;
@ -132,18 +153,9 @@ static PVRSRV_ERROR _RGXCCBPDumpTransition(IMG_PVOID *pvData, IMG_BOOL bInto, IM
thus we have no way of knowing if we can skip drain and the sync
prim dump or not.
*/
PDUMPCOMMENTWITHFLAGS(ui32PDumpFlags,
"cCCB(%s@%p): Draining rgxfw_roff == woff (%d)",
psClientCCB->szName,
psClientCCB,
psClientCCB->ui32LastPDumpWriteOffset);
eError = DevmemPDumpDevmemPol32(psClientCCB->psClientCCBCtrlMemDesc,
offsetof(RGXFWIF_CCCB_CTL, ui32ReadOffset),
psClientCCB->ui32LastPDumpWriteOffset,
0xffffffff,
PDUMP_POLL_OPERATOR_EQUAL,
ui32PDumpFlags);
eError = RGXCCBPDumpDrainCCB(psClientCCB, bContinuous);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_WARNING, "_RGXCCBPDumpTransition: problem pdumping POL for cCCBCtl (%d)", eError));

3
drivers/gpu/rogue_m/services/server/devices/rgx/rgxccb.h
View File

@ -107,6 +107,9 @@ typedef struct _RGX_CCB_CMD_HELPER_DATA_ {
#define PADDING_COMMAND_SIZE (sizeof(RGXFWIF_CCB_CMD_HEADER))
PVRSRV_ERROR RGXCCBPDumpDrainCCB(RGX_CLIENT_CCB *psClientCCB,
IMG_UINT32 ui32PDumpContinuous);
PVRSRV_ERROR RGXCreateCCB(PVRSRV_DEVICE_NODE *psDeviceNode,
IMG_UINT32 ui32CCBSizeLog2,
CONNECTION_DATA *psConnectionData,

2
drivers/gpu/rogue_m/services/server/devices/rgx/rgxcompute.c
View File

@ -207,7 +207,7 @@ PVRSRV_ERROR PVRSRVRGXDestroyComputeContextKM(RGX_SERVER_COMPUTE_CONTEXT *psComp
/* Check if the FW has finished with this resource ... */
eError = RGXFWRequestCommonContextCleanUp(psComputeContext->psDeviceNode,
FWCommonContextGetFWAddress(psComputeContext->psServerCommonContext),
psComputeContext->psServerCommonContext,
psComputeContext->psSync,
RGXFWIF_DM_CDM);

2
drivers/gpu/rogue_m/services/server/devices/rgx/rgxdebug.c
View File

@ -2868,7 +2868,7 @@ IMG_VOID RGXDebugRequestProcess(DUMPDEBUG_PRINTF_FUNC *pfnDumpDebugPrintf,
/* Dump the IRQ info */
{
PVR_DUMPDEBUG_LOG(("RGX FW IRQ count = %d, last sampled in MISR = %d",
PVR_DUMPDEBUG_LOG(("RGX FW IRQ count = %d, last sampled in LISR = %d",
psDevInfo->psRGXFWIfTraceBuf->ui32InterruptCount,
g_ui32HostSampleIRQCount));
}

25
drivers/gpu/rogue_m/services/server/devices/rgx/rgxfwutils.c
View File

@ -461,9 +461,8 @@ PVRSRV_ERROR FWCommonContextAllocate(CONNECTION_DATA *psConnection,
}
/* Record this context so we can refer to it if the FW needs to tell us it was reset. */
psServerCommonContext->eLastResetReason = RGXFWIF_CONTEXT_RESET_REASON_NONE;
psServerCommonContext->ui32ContextID = psDevInfo->ui32CommonCtxtCurrentID++;
dllist_add_to_tail(&(psDevInfo->sCommonCtxtListHead), &(psServerCommonContext->sListNode));
psServerCommonContext->eLastResetReason = RGXFWIF_CONTEXT_RESET_REASON_NONE;
psServerCommonContext->ui32ContextID = psDevInfo->ui32CommonCtxtCurrentID++;
/* Allocate the client CCB */
eError = RGXCreateCCB(psDeviceNode,
@ -564,6 +563,8 @@ PVRSRV_ERROR FWCommonContextAllocate(CONNECTION_DATA *psConnection,
pszContextName,
psServerCommonContext->sFWCommonContextFWAddr.ui32Addr);
#endif
/*Add the node to the list when finalised */
dllist_add_to_tail(&(psDevInfo->sCommonCtxtListHead), &(psServerCommonContext->sListNode));
*ppsServerCommonContext = psServerCommonContext;
return PVRSRV_OK;
@ -584,6 +585,10 @@ PVRSRV_ERROR FWCommonContextAllocate(CONNECTION_DATA *psConnection,
IMG_VOID FWCommonContextFree(RGX_SERVER_COMMON_CONTEXT *psServerCommonContext)
{
/* Remove the context from the list of all contexts. */
dllist_remove_node(&psServerCommonContext->sListNode);
/*
Unmap the context itself and then all it's resources
*/
@ -606,8 +611,6 @@ IMG_VOID FWCommonContextFree(RGX_SERVER_COMMON_CONTEXT *psServerCommonContext)
/* Destroy the client CCB */
RGXDestroyCCB(psServerCommonContext->psClientCCB);
/* Remove the context from the list of all contexts. */
dllist_remove_node(&psServerCommonContext->sListNode);
/* Free the FW common context (if there was one) */
if (!psServerCommonContext->bCommonContextMemProvided)
@ -3345,14 +3348,22 @@ PVRSRV_ERROR RGXScheduleCleanupCommand(PVRSRV_RGXDEV_INFO *psDevInfo,
RGXRequestCommonContextCleanUp
*/
PVRSRV_ERROR RGXFWRequestCommonContextCleanUp(PVRSRV_DEVICE_NODE *psDeviceNode,
PRGXFWIF_FWCOMMONCONTEXT psFWCommonContextFWAddr,
RGX_SERVER_COMMON_CONTEXT *psServerCommonContext,
PVRSRV_CLIENT_SYNC_PRIM *psSyncPrim,
RGXFWIF_DM eDM)
{
RGXFWIF_KCCB_CMD sRCCleanUpCmd = {0};
PVRSRV_ERROR eError;
PRGXFWIF_FWCOMMONCONTEXT psFWCommonContextFWAddr;
psFWCommonContextFWAddr = FWCommonContextGetFWAddress(psServerCommonContext);
PDUMPCOMMENT("Common ctx cleanup Request DM%d [context = 0x%08x]",
eDM, psFWCommonContextFWAddr.ui32Addr);
PDUMPCOMMENT("Wait for CCB to be empty before common ctx cleanup");
RGXCCBPDumpDrainCCB(FWCommonContextGetClientCCB(psServerCommonContext), IMG_FALSE);
PDUMPCOMMENT("Common ctx cleanup Request DM%d [context = 0x%08x]", eDM, psFWCommonContextFWAddr.ui32Addr);
/* Setup our command data, the cleanup call will fill in the rest */
sRCCleanUpCmd.uCmdData.sCleanupData.uCleanupData.psContext = psFWCommonContextFWAddr;

2
drivers/gpu/rogue_m/services/server/devices/rgx/rgxfwutils.h
View File

@ -491,7 +491,7 @@ PVRSRV_ERROR RGXWaitForFWOp(PVRSRV_RGXDEV_INFO *psDevInfo,
******************************************************************************/
PVRSRV_ERROR RGXFWRequestCommonContextCleanUp(PVRSRV_DEVICE_NODE *psDeviceNode,
PRGXFWIF_FWCOMMONCONTEXT psFWContext,
RGX_SERVER_COMMON_CONTEXT *psServerCommonContext,
PVRSRV_CLIENT_SYNC_PRIM *psSyncPrim,
RGXFWIF_DM eDM);

6
drivers/gpu/rogue_m/services/server/devices/rgx/rgxinit.c
View File

@ -342,8 +342,8 @@ static PVRSRV_ERROR RGXGetGpuUtilStats(PVRSRV_DEVICE_NODE *psDeviceNode,
/***** (2) Get latest data from shared area *****/
OSLockAcquire(psDevInfo->hGPUUtilLock);
//zxl: Remove hGPUUtilLock to avoid dead lock.
//OSLockAcquire(psDevInfo->hGPUUtilLock);
/* Read the timer before reading the latest stats from the shared
* area, discard it later in case of state updates after this point.
@ -373,7 +373,7 @@ static PVRSRV_ERROR RGXGetGpuUtilStats(PVRSRV_DEVICE_NODE *psDeviceNode,
psReturnStats->ui32GpuEnergy = psDevInfo->psRGXFWIfTraceBuf->ui32PowMonEnergy;
#endif
OSLockRelease(psDevInfo->hGPUUtilLock);
//OSLockRelease(psDevInfo->hGPUUtilLock);
if (i == MAX_ITERATIONS)
{

20
drivers/gpu/rogue_m/services/server/devices/rgx/rgxmmuinit.c
View File

@ -163,11 +163,11 @@ static RGX_PAGESIZECONFIG gsPageSizeConfig2MB;
/* Forward declaration of protection bits derivation functions, for
the following structure */
static IMG_UINT64 RGXDerivePCEProt8(IMG_UINT32 uiProtFlags, IMG_UINT8 ui8Log2PageSize);
static IMG_UINT64 RGXDerivePCEProt8(IMG_UINT32 uiProtFlags, IMG_UINT32 ui32Log2PageSize);
static IMG_UINT32 RGXDerivePCEProt4(IMG_UINT32 uiProtFlags);
static IMG_UINT64 RGXDerivePDEProt8(IMG_UINT32 uiProtFlags, IMG_UINT8 ui8Log2PageSize);
static IMG_UINT64 RGXDerivePDEProt8(IMG_UINT32 uiProtFlags, IMG_UINT32 ui32Log2PageSize);
static IMG_UINT32 RGXDerivePDEProt4(IMG_UINT32 uiProtFlags);
static IMG_UINT64 RGXDerivePTEProt8(IMG_UINT32 uiProtFlags, IMG_UINT8 ui8Log2PageSize);
static IMG_UINT64 RGXDerivePTEProt8(IMG_UINT32 uiProtFlags, IMG_UINT32 ui32Log2PageSize);
static IMG_UINT32 RGXDerivePTEProt4(IMG_UINT32 uiProtFlags);
static PVRSRV_ERROR RGXGetPageSizeConfigCB(IMG_UINT32 uiLog2DataPageSize,
@ -698,10 +698,10 @@ static IMG_UINT32 RGXDerivePCEProt4(IMG_UINT32 uiProtFlags)
@Description calculate the PCE protection flags based on an 8 byte entry
@Return PVRSRV_ERROR
*/ /**************************************************************************/
static IMG_UINT64 RGXDerivePCEProt8(IMG_UINT32 uiProtFlags, IMG_UINT8 ui8Log2PageSize)
static IMG_UINT64 RGXDerivePCEProt8(IMG_UINT32 uiProtFlags, IMG_UINT32 ui32Log2PageSize)
{
PVR_UNREFERENCED_PARAMETER(uiProtFlags);
PVR_UNREFERENCED_PARAMETER(ui8Log2PageSize);
PVR_UNREFERENCED_PARAMETER(ui32Log2PageSize);
PVR_DPF((PVR_DBG_ERROR, "8-byte PCE not supported on this device"));
return 0;
@ -731,13 +731,13 @@ static IMG_UINT32 RGXDerivePDEProt4(IMG_UINT32 uiProtFlags)
@Return PVRSRV_ERROR
*/ /**************************************************************************/
static IMG_UINT64 RGXDerivePDEProt8(IMG_UINT32 uiProtFlags, IMG_UINT8 ui8Log2PageSize)
static IMG_UINT64 RGXDerivePDEProt8(IMG_UINT32 uiProtFlags, IMG_UINT32 ui32Log2PageSize)
{
IMG_UINT64 ret_value = 0; // 0 means invalid
if (! (uiProtFlags & MMU_PROTFLAGS_INVALID)) // if not invalid
{
switch (ui8Log2PageSize)
switch (ui32Log2PageSize)
{
case 12:
ret_value = RGX_MMUCTRL_PD_DATA_VALID_EN | RGX_MMUCTRL_PD_DATA_PAGE_SIZE_4KB;
@ -760,7 +760,7 @@ static IMG_UINT64 RGXDerivePDEProt8(IMG_UINT32 uiProtFlags, IMG_UINT8 ui8Log2Pag
default:
PVR_DPF((PVR_DBG_ERROR,
"%s:%d: in function<%s>: Invalid parameter log2_page_size. Expected {12, 14, 16, 18, 20, 21}. Got [%u]",
__FILE__, __LINE__, __FUNCTION__, ui8Log2PageSize));
__FILE__, __LINE__, __FUNCTION__, ui32Log2PageSize));
}
}
return ret_value;
@ -785,11 +785,11 @@ static IMG_UINT32 RGXDerivePTEProt4(IMG_UINT32 uiProtFlags)
@Description calculate the PTE protection flags based on an 8 byte entry
@Return PVRSRV_ERROR
*/ /**************************************************************************/
static IMG_UINT64 RGXDerivePTEProt8(IMG_UINT32 uiProtFlags, IMG_UINT8 ui8Log2PageSize)
static IMG_UINT64 RGXDerivePTEProt8(IMG_UINT32 uiProtFlags, IMG_UINT32 ui32Log2PageSize)
{
IMG_UINT64 ui64MMUFlags=0;
PVR_UNREFERENCED_PARAMETER(ui8Log2PageSize);
PVR_UNREFERENCED_PARAMETER(ui32Log2PageSize);
if(((MMU_PROTFLAGS_READABLE|MMU_PROTFLAGS_WRITEABLE) & uiProtFlags) == (MMU_PROTFLAGS_READABLE|MMU_PROTFLAGS_WRITEABLE))
{

10
drivers/gpu/rogue_m/services/server/devices/rgx/rgxta3d.c
View File

@ -144,7 +144,7 @@ PVRSRV_ERROR _DestroyTAContext(RGX_SERVER_RC_TA_DATA *psTAData,
/* Check if the FW has finished with this resource ... */
eError = RGXFWRequestCommonContextCleanUp(psDeviceNode,
FWCommonContextGetFWAddress(psTAData->psServerCommonContext),
psTAData->psServerCommonContext,
psCleanupSync,
RGXFWIF_DM_TA);
if (eError == PVRSRV_ERROR_RETRY)
@ -181,6 +181,7 @@ PVRSRV_ERROR _DestroyTAContext(RGX_SERVER_RC_TA_DATA *psTAData,
#endif
FWCommonContextFree(psTAData->psServerCommonContext);
DevmemFwFree(psTAData->psContextStateMemDesc);
psTAData->psServerCommonContext = NULL;
return PVRSRV_OK;
}
@ -193,7 +194,7 @@ PVRSRV_ERROR _Destroy3DContext(RGX_SERVER_RC_3D_DATA *ps3DData,
/* Check if the FW has finished with this resource ... */
eError = RGXFWRequestCommonContextCleanUp(psDeviceNode,
FWCommonContextGetFWAddress(ps3DData->psServerCommonContext),
ps3DData->psServerCommonContext,
psCleanupSync,
RGXFWIF_DM_3D);
if (eError == PVRSRV_ERROR_RETRY)
@ -231,6 +232,7 @@ PVRSRV_ERROR _Destroy3DContext(RGX_SERVER_RC_3D_DATA *ps3DData,
FWCommonContextFree(ps3DData->psServerCommonContext);
DevmemFwFree(ps3DData->psContextStateMemDesc);
ps3DData->psServerCommonContext = NULL;
return PVRSRV_OK;
}
@ -3368,11 +3370,11 @@ static IMG_BOOL CheckForStalledClientRenderCtxtCommand(PDLLIST_NODE psNode, IMG_
RGX_SERVER_RC_3D_DATA *psRenderCtx3DData = &(psCurrentServerRenderCtx->s3DData);
RGX_SERVER_COMMON_CONTEXT *psCurrentServer3DCommonCtx = psRenderCtx3DData->psServerCommonContext;
if (PVRSRV_ERROR_CCCB_STALLED == CheckStalledClientCommonContext(psCurrentServerTACommonCtx))
if (psCurrentServerTACommonCtx && (PVRSRV_ERROR_CCCB_STALLED == CheckStalledClientCommonContext(psCurrentServerTACommonCtx)))
{
*peError = PVRSRV_ERROR_CCCB_STALLED;
}
if (PVRSRV_ERROR_CCCB_STALLED == CheckStalledClientCommonContext(psCurrentServer3DCommonCtx))
if (psCurrentServer3DCommonCtx && (PVRSRV_ERROR_CCCB_STALLED == CheckStalledClientCommonContext(psCurrentServer3DCommonCtx)))
{
*peError = PVRSRV_ERROR_CCCB_STALLED;
}

11
drivers/gpu/rogue_m/services/server/devices/rgx/rgxtransfer.c
View File

@ -196,7 +196,7 @@ static PVRSRV_ERROR _Destroy2DTransferContext(RGX_SERVER_TQ_2D_DATA *ps2DData,
/* Check if the FW has finished with this resource ... */
eError = RGXFWRequestCommonContextCleanUp(psDeviceNode,
FWCommonContextGetFWAddress(ps2DData->psServerCommonContext),
ps2DData->psServerCommonContext,
psCleanupSync,
RGXFWIF_DM_2D);
if (eError == PVRSRV_ERROR_RETRY)
@ -212,6 +212,7 @@ static PVRSRV_ERROR _Destroy2DTransferContext(RGX_SERVER_TQ_2D_DATA *ps2DData,
/* ... it has so we can free it's resources */
FWCommonContextFree(ps2DData->psServerCommonContext);
ps2DData->psServerCommonContext = NULL;
return PVRSRV_OK;
}
@ -223,7 +224,7 @@ static PVRSRV_ERROR _Destroy3DTransferContext(RGX_SERVER_TQ_3D_DATA *ps3DData,
/* Check if the FW has finished with this resource ... */
eError = RGXFWRequestCommonContextCleanUp(psDeviceNode,
FWCommonContextGetFWAddress(ps3DData->psServerCommonContext),
ps3DData->psServerCommonContext,
psCleanupSync,
RGXFWIF_DM_3D);
if (eError == PVRSRV_ERROR_RETRY)
@ -240,7 +241,7 @@ static PVRSRV_ERROR _Destroy3DTransferContext(RGX_SERVER_TQ_3D_DATA *ps3DData,
/* ... it has so we can free it's resources */
DevmemFwFree(ps3DData->psFWContextStateMemDesc);
FWCommonContextFree(ps3DData->psServerCommonContext);
ps3DData->psServerCommonContext = NULL;
return PVRSRV_OK;
}
@ -960,11 +961,11 @@ static IMG_BOOL CheckForStalledClientTransferCtxtCommand(PDLLIST_NODE psNode, IM
RGX_SERVER_TQ_3D_DATA *psTransferCtx3DData = &(psCurrentServerTransferCtx->s3DData);
RGX_SERVER_COMMON_CONTEXT *psCurrentServerTQ3DCommonCtx = psTransferCtx3DData->psServerCommonContext;
if (PVRSRV_ERROR_CCCB_STALLED == CheckStalledClientCommonContext(psCurrentServerTQ2DCommonCtx))
if (psCurrentServerTQ2DCommonCtx && (PVRSRV_ERROR_CCCB_STALLED == CheckStalledClientCommonContext(psCurrentServerTQ2DCommonCtx)))
{
*peError = PVRSRV_ERROR_CCCB_STALLED;
}
if (PVRSRV_ERROR_CCCB_STALLED == CheckStalledClientCommonContext(psCurrentServerTQ3DCommonCtx))
if (psCurrentServerTQ3DCommonCtx && (PVRSRV_ERROR_CCCB_STALLED == CheckStalledClientCommonContext(psCurrentServerTQ3DCommonCtx)))
{
*peError = PVRSRV_ERROR_CCCB_STALLED;
}

38
drivers/gpu/rogue_m/services/server/env/linux/allocmem.c vendored
View File

@ -50,7 +50,7 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#if defined(PVRSRV_ENABLE_PROCESS_STATS)
#include "process_stats.h"
#endif
#include "osfunc.h"
IMG_INTERNAL IMG_PVOID OSAllocMem(IMG_UINT32 ui32Size)
{
IMG_PVOID pvRet = IMG_NULL;
@ -61,7 +61,12 @@ IMG_INTERNAL IMG_PVOID OSAllocMem(IMG_UINT32 ui32Size)
}
if (pvRet == IMG_NULL)
{
#if !defined(PVR_DISABLE_KMALLOC_MEMSTATS)
/* Allocate an additional 4 bytes to store the PID of the allocating process */
pvRet = kmalloc(ui32Size + sizeof(IMG_UINT32), GFP_KERNEL);
#else
pvRet = kmalloc(ui32Size, GFP_KERNEL);
#endif
}
#if defined(PVRSRV_ENABLE_PROCESS_STATS)
@ -72,7 +77,14 @@ IMG_INTERNAL IMG_PVOID OSAllocMem(IMG_UINT32 ui32Size)
if (!is_vmalloc_addr(pvRet))
{
#if !defined(PVRSRV_ENABLE_MEMORY_STATS)
#if !defined(PVR_DISABLE_KMALLOC_MEMSTATS)
{
/* Store the PID in the final additional 4 bytes allocated */
IMG_UINT32 *puiTemp = (IMG_UINT32*) (((IMG_BYTE*)pvRet) + (ksize(pvRet) - sizeof(IMG_UINT32)));
*puiTemp = OSGetCurrentProcessID();
}
PVRSRVStatsIncrMemAllocStat(PVRSRV_MEM_ALLOC_TYPE_KMALLOC, ksize(pvRet));
#endif
#else
{
IMG_CPU_PHYADDR sCpuPAddr;
@ -89,9 +101,11 @@ IMG_INTERNAL IMG_PVOID OSAllocMem(IMG_UINT32 ui32Size)
else
{
#if !defined(PVRSRV_ENABLE_MEMORY_STATS)
#if !defined(PVR_DISABLE_KMALLOC_MEMSTATS)
PVRSRVStatsIncrMemAllocStatAndTrack(PVRSRV_MEM_ALLOC_TYPE_VMALLOC,
((ui32Size + PAGE_SIZE -1) & ~(PAGE_SIZE-1)),
(IMG_UINT64)(IMG_UINTPTR_T) pvRet);
#endif
#else
{
IMG_CPU_PHYADDR sCpuPAddr;
@ -138,7 +152,12 @@ IMG_INTERNAL IMG_PVOID OSAllocZMem(IMG_UINT32 ui32Size)
}
if (pvRet == IMG_NULL)
{
#if !defined(PVR_DISABLE_KMALLOC_MEMSTATS)
/* Allocate an additional 4 bytes to store the PID of the allocating process */
pvRet = kzalloc(ui32Size + sizeof(IMG_UINT32), GFP_KERNEL);
#else
pvRet = kzalloc(ui32Size, GFP_KERNEL);
#endif
}
#if defined(PVRSRV_ENABLE_PROCESS_STATS)
@ -149,7 +168,14 @@ IMG_INTERNAL IMG_PVOID OSAllocZMem(IMG_UINT32 ui32Size)
if (!is_vmalloc_addr(pvRet))
{
#if !defined(PVRSRV_ENABLE_MEMORY_STATS)
#if !defined(PVR_DISABLE_KMALLOC_MEMSTATS)
{
/* Store the PID in the final additional 4 bytes allocated */
IMG_UINT32 *puiTemp = (IMG_UINT32*) (((IMG_BYTE*)pvRet) + (ksize(pvRet) - sizeof(IMG_UINT32)));
*puiTemp = OSGetCurrentProcessID();
}
PVRSRVStatsIncrMemAllocStat(PVRSRV_MEM_ALLOC_TYPE_KMALLOC, ksize(pvRet));
#endif
#else
{
IMG_CPU_PHYADDR sCpuPAddr;
@ -166,9 +192,11 @@ IMG_INTERNAL IMG_PVOID OSAllocZMem(IMG_UINT32 ui32Size)
else
{
#if !defined(PVRSRV_ENABLE_MEMORY_STATS)
#if !defined(PVR_DISABLE_KMALLOC_MEMSTATS)
PVRSRVStatsIncrMemAllocStatAndTrack(PVRSRV_MEM_ALLOC_TYPE_VMALLOC,
((ui32Size + PAGE_SIZE -1) & ~(PAGE_SIZE-1)),
(IMG_UINT64)(IMG_UINTPTR_T) pvRet);
#endif
#else
{
IMG_CPU_PHYADDR sCpuPAddr;
@ -213,7 +241,9 @@ IMG_INTERNAL void OSFreeMem(IMG_PVOID pvMem)
if (pvMem != IMG_NULL)
{
#if !defined(PVRSRV_ENABLE_MEMORY_STATS)
PVRSRVStatsDecrMemAllocStat(PVRSRV_MEM_ALLOC_TYPE_KMALLOC, ksize(pvMem));
#if !defined(PVR_DISABLE_KMALLOC_MEMSTATS)
PVRSRVStatsDecrMemKAllocStat(ksize(pvMem), *((IMG_UINT32*) (((IMG_BYTE*)pvMem) + (ksize(pvMem) - sizeof(IMG_UINT32)))));
#endif
#else
PVRSRVStatsRemoveMemAllocRecord(PVRSRV_MEM_ALLOC_TYPE_KMALLOC,
(IMG_UINT64)(IMG_UINTPTR_T) pvMem);
@ -228,8 +258,10 @@ IMG_INTERNAL void OSFreeMem(IMG_PVOID pvMem)
if (pvMem != IMG_NULL)
{
#if !defined(PVRSRV_ENABLE_MEMORY_STATS)
#if !defined(PVR_DISABLE_KMALLOC_MEMSTATS)
PVRSRVStatsDecrMemAllocStatAndUntrack(PVRSRV_MEM_ALLOC_TYPE_VMALLOC,
(IMG_UINT64)(IMG_UINTPTR_T) pvMem);
(IMG_UINT64)(IMG_UINTPTR_T) pvMem);
#endif
#else
PVRSRVStatsRemoveMemAllocRecord(PVRSRV_MEM_ALLOC_TYPE_VMALLOC,
(IMG_UINT64)(IMG_UINTPTR_T) pvMem);

4
drivers/gpu/rogue_m/services/server/env/linux/osfunc.c vendored
View File

@ -219,8 +219,7 @@ PVRSRV_ERROR OSMMUPxAlloc(PVRSRV_DEVICE_NODE *psDevNode, IMG_SIZE_T uiSize,
return PVRSRV_ERROR_UNABLE_TO_SET_CACHE_MODE;
}
}
#endif
#if defined(CONFIG_ARM) || defined(CONFIG_ARM64) || defined (CONFIG_METAG)
#else
{
IMG_CPU_PHYADDR sCPUPhysAddrStart, sCPUPhysAddrEnd;
IMG_PVOID pvPageVAddr = kmap(psPage);
@ -232,6 +231,7 @@ PVRSRV_ERROR OSMMUPxAlloc(PVRSRV_DEVICE_NODE *psDevNode, IMG_SIZE_T uiSize,
pvPageVAddr + PAGE_SIZE,
sCPUPhysAddrStart,
sCPUPhysAddrEnd);
kunmap(psPage);
}
#endif

4
drivers/gpu/rogue_m/services/server/env/linux/ossecure_export.c vendored
View File

@ -57,6 +57,10 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "pvr_drm.h"
#endif
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 19, 0))
#define get_unused_fd() get_unused_fd_flags(0)
#endif
PVRSRV_ERROR OSSecureExport(CONNECTION_DATA *psConnection,
IMG_PVOID pvData,
IMG_SECURE_TYPE *phSecure,

26
drivers/gpu/rogue_m/services/server/env/linux/pvr_debugfs.c vendored
View File

@ -105,7 +105,7 @@ typedef struct _PVR_DEBUGFS_PRIV_DATA_
static void _RefDirEntry(PVR_DEBUGFS_DIR_DATA *psDirEntry);
static void _UnrefAndMaybeDestroyDirEntry(PVR_DEBUGFS_DIR_DATA *psDirEntry);
static void _UnrefAndMaybeDestroyDirEntryWhileLocked(PVR_DEBUGFS_DIR_DATA *psDirEntry);
static IMG_BOOL _RefDebugFSEntry(PVR_DEBUGFS_ENTRY_DATA *psDebugFSEntry);
static IMG_BOOL _RefDebugFSEntryNoLock(PVR_DEBUGFS_ENTRY_DATA *psDebugFSEntry);
static void _UnrefAndMaybeDestroyDebugFSEntry(PVR_DEBUGFS_ENTRY_DATA *psDebugFSEntry);
static IMG_BOOL _RefStatEntry(PVR_DEBUGFS_DRIVER_STAT *psStatEntry);
static IMG_BOOL _UnrefAndMaybeDestroyStatEntry(PVR_DEBUGFS_DRIVER_STAT *psStatEntry);
@ -258,6 +258,8 @@ static int _DebugFSFileOpen(struct inode *psINode, struct file *psFile)
IMG_BOOL bRefRet = IMG_FALSE;
PVR_DEBUGFS_ENTRY_DATA *psDebugFSEntry = NULL;
mutex_lock(&gDebugFSLock);
PVR_ASSERT(psINode);
psPrivData = (PVR_DEBUGFS_PRIV_DATA *)psINode->i_private;
@ -273,7 +275,8 @@ static int _DebugFSFileOpen(struct inode *psINode, struct file *psFile)
*/
if (psDebugFSEntry)
{
bRefRet = _RefDebugFSEntry(psDebugFSEntry);
bRefRet = _RefDebugFSEntryNoLock(psDebugFSEntry);
mutex_unlock(&gDebugFSLock);
if (bRefRet)
{
iResult = seq_open(psFile, psPrivData->psReadOps);
@ -291,7 +294,19 @@ static int _DebugFSFileOpen(struct inode *psINode, struct file *psFile)
}
}
}
else
{
mutex_unlock(&gDebugFSLock);
}
}
else
{
mutex_unlock(&gDebugFSLock);
}
}
else
{
mutex_unlock(&gDebugFSLock);
}
return iResult;
@ -728,14 +743,12 @@ static void _UnrefAndMaybeDestroyDirEntry(PVR_DEBUGFS_DIR_DATA *psDirEntry)
mutex_unlock(&gDebugFSLock);
}
static IMG_BOOL _RefDebugFSEntry(PVR_DEBUGFS_ENTRY_DATA *psDebugFSEntry)
static IMG_BOOL _RefDebugFSEntryNoLock(PVR_DEBUGFS_ENTRY_DATA *psDebugFSEntry)
{
IMG_BOOL bResult = IMG_FALSE;
PVR_ASSERT(psDebugFSEntry != NULL);
mutex_lock(&gDebugFSLock);
bResult = (psDebugFSEntry->ui32RefCount > 0);
if (bResult)
{
@ -743,8 +756,6 @@ static IMG_BOOL _RefDebugFSEntry(PVR_DEBUGFS_ENTRY_DATA *psDebugFSEntry)
psDebugFSEntry->ui32RefCount++;
}
mutex_unlock(&gDebugFSLock);
return bResult;
}
@ -770,6 +781,7 @@ static void _UnrefAndMaybeDestroyDebugFSEntry(PVR_DEBUGFS_ENTRY_DATA *psDebugFSE
psPrivData->bValid = IMG_FALSE;
psPrivData->psDebugFSEntry = NULL;
OSFreeMemstatMem(psEntry->d_inode->i_private);
psEntry->d_inode->i_private = IMG_NULL;
}
debugfs_remove(psEntry);
}

6
drivers/gpu/rogue_m/services/server/include/mmu_common.h
View File

@ -127,15 +127,15 @@ typedef struct _MMU_DEVICEATTRIBS_
const struct _MMU_DEVVADDR_CONFIG_ *psTopLevelDevVAddrConfig;
/*! Callback for creating protection bits for the page catalogue entry with 8 byte entry */
IMG_UINT64 (*pfnDerivePCEProt8)(IMG_UINT32, IMG_UINT8);
IMG_UINT64 (*pfnDerivePCEProt8)(IMG_UINT32, IMG_UINT32);
/*! Callback for creating protection bits for the page catalogue entry with 4 byte entry */
IMG_UINT32 (*pfnDerivePCEProt4)(IMG_UINT32);
/*! Callback for creating protection bits for the page directory entry with 8 byte entry */
IMG_UINT64 (*pfnDerivePDEProt8)(IMG_UINT32, IMG_UINT8);
IMG_UINT64 (*pfnDerivePDEProt8)(IMG_UINT32, IMG_UINT32);
/*! Callback for creating protection bits for the page directory entry with 4 byte entry */
IMG_UINT32 (*pfnDerivePDEProt4)(IMG_UINT32);
/*! Callback for creating protection bits for the page table entry with 8 byte entry */
IMG_UINT64 (*pfnDerivePTEProt8)(IMG_UINT32, IMG_UINT8);
IMG_UINT64 (*pfnDerivePTEProt8)(IMG_UINT32, IMG_UINT32);
/*! Callback for creating protection bits for the page table entry with 4 byte entry */
IMG_UINT32 (*pfnDerivePTEProt4)(IMG_UINT32);

3
drivers/gpu/rogue_m/services/server/include/process_stats.h
View File

@ -114,6 +114,9 @@ IMG_VOID PVRSRVStatsIncrMemAllocStatAndTrack(PVRSRV_MEM_ALLOC_TYPE eAllocType,
IMG_VOID PVRSRVStatsDecrMemAllocStat(PVRSRV_MEM_ALLOC_TYPE eAllocType,
IMG_SIZE_T uiBytes);
IMG_VOID PVRSRVStatsDecrMemKAllocStat(IMG_SIZE_T uiBytes,
IMG_PID decrPID);
/*
* Decrease the memory stat for eAllocType. Takes the allocation size value from the
* hash table with uiCpuVAddr as key. Pair with PVRSRVStatsIncrMemAllocStatAndTrack().

15
drivers/gpu/rogue_m/services/shared/common/devicemem.c
View File

@ -1186,6 +1186,11 @@ DevmemAllocate(DEVMEM_HEAP *psHeap,
failMemDescAlloc:
failParams:
PVR_ASSERT(eError != PVRSRV_OK);
PVR_DPF((PVR_DBG_ERROR,
"%s: Failed! Error is %s. Allocation size: %#llX",
__func__,
PVRSRVGETERRORSTRING(eError),
(unsigned long long) uiSize));
return eError;
}
@ -1304,6 +1309,11 @@ DevmemAllocateExportable(IMG_HANDLE hBridge,
failMemDescAlloc:
failParams:
PVR_ASSERT(eError != PVRSRV_OK);
PVR_DPF((PVR_DBG_ERROR,
"%s: Failed! Error is %s. Allocation size: %#llX",
__func__,
PVRSRVGETERRORSTRING(eError),
(unsigned long long) uiSize));
return eError;
}
@ -1423,6 +1433,11 @@ DevmemAllocateSparse(IMG_HANDLE hBridge,
failMemDescAlloc:
failParams:
PVR_ASSERT(eError != PVRSRV_OK);
PVR_DPF((PVR_DBG_ERROR,
"%s: Failed! Error is %s. Allocation size: %#llX",
__func__,
PVRSRVGETERRORSTRING(eError),
(unsigned long long) uiSize));
return eError;
}

4
drivers/gpu/rogue_m/system/rk3368/rk_init.c
View File

@ -2129,13 +2129,13 @@ PVRSRV_ERROR IonInit(void *phPrivateData)
struct ion_device *IonDevAcquire(IMG_VOID)
{
return g_psIonDev;
return rockchip_ion_dev;
}
IMG_VOID IonDevRelease(struct ion_device *psIonDev)
{
/* Nothing to do, sanity check the pointer we're passed back */
PVR_ASSERT(psIonDev == g_psIonDev);
PVR_ASSERT(psIonDev == rockchip_ion_dev);
}
IMG_UINT32 IonPhysHeapID(IMG_VOID)

2
drivers/gpu/rogue_m/system/rk3368/sysconfig.c
View File

@ -154,7 +154,7 @@ PVRSRV_ERROR SysCreateConfigData(PVRSRV_SYSTEM_CONFIG **ppsSysConfig, void *hDev
*/
gsRGXTimingInfo.ui32CoreClockSpeed = RGX_RK_CORE_CLOCK_SPEED;
gsRGXTimingInfo.bEnableActivePM = IMG_TRUE;
gsRGXTimingInfo.bEnableRDPowIsland = IMG_FALSE;
gsRGXTimingInfo.bEnableRDPowIsland = IMG_TRUE;
gsRGXTimingInfo.ui32ActivePMLatencyms = SYS_RGX_ACTIVE_POWER_LATENCY_MS;
/*