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Merge branch 'net-dsa-lantiq_gswip-prepare-for-supporting-maxlinear-gsw1xx'

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Daniel Golle says:

====================
net: dsa: lantiq_gswip: prepare for supporting MaxLinear GSW1xx

Continue to prepare for supporting the newer standalone MaxLinear GSW1xx
switch family by extending the existing lantiq_gswip driver to allow it
to support MII interfaces and MDIO bus of the GSW1xx.

This series has been preceded by an RFC series which covers everything
needed to support the MaxLinear GSW1xx family of switches. Andrew Lunn
had suggested to split it into a couple of smaller series and start
with the changes which don't yet make actual functional changes or
support new features.

Everything has been compile and runtime tested on AVM Fritz!Box 7490
(GSWIP version 2.1, VR9 v1.2)

Link: https://lore.kernel.org/netdev/aKDhFCNwjDDwRKsI@pidgin.makrotopia.org/
====================

Link: https://patch.msgid.link/cover.1756520811.git.daniel@makrotopia.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Jakub Kicinski 2025-09-02 17:45:44 -07:00
commit 1d8f005909
8 changed files with 57 additions and 22 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
MAINTAINERS
View File

@ -13812,8 +13812,7 @@ M: Hauke Mehrtens <hauke@hauke-m.de>
L: netdev@vger.kernel.org
S: Maintained
F: Documentation/devicetree/bindings/net/dsa/lantiq,gswip.yaml
F: drivers/net/dsa/lantiq_gswip.c
F: drivers/net/dsa/lantiq_pce.h
F: drivers/net/dsa/lantiq/*
F: drivers/net/ethernet/lantiq_xrx200.c
F: net/dsa/tag_gswip.c

8
drivers/net/dsa/Kconfig
View File

@ -26,13 +26,7 @@ config NET_DSA_LOOP
source "drivers/net/dsa/hirschmann/Kconfig"
config NET_DSA_LANTIQ_GSWIP
tristate "Lantiq / Intel GSWIP"
depends on HAS_IOMEM
select NET_DSA_TAG_GSWIP
help
This enables support for the Lantiq / Intel GSWIP 2.1 found in
the xrx200 / VR9 SoC.
source "drivers/net/dsa/lantiq/Kconfig"
config NET_DSA_MT7530
tristate "MediaTek MT7530 and MT7531 Ethernet switch support"

2
drivers/net/dsa/Makefile
View File

@ -6,7 +6,6 @@ ifdef CONFIG_NET_DSA_LOOP
obj-$(CONFIG_FIXED_PHY) += dsa_loop_bdinfo.o
endif
obj-$(CONFIG_NET_DSA_KS8995) += ks8995.o
obj-$(CONFIG_NET_DSA_LANTIQ_GSWIP) += lantiq_gswip.o
obj-$(CONFIG_NET_DSA_MT7530) += mt7530.o
obj-$(CONFIG_NET_DSA_MT7530_MDIO) += mt7530-mdio.o
obj-$(CONFIG_NET_DSA_MT7530_MMIO) += mt7530-mmio.o
@ -20,6 +19,7 @@ obj-$(CONFIG_NET_DSA_VITESSE_VSC73XX_PLATFORM) += vitesse-vsc73xx-platform.o
obj-$(CONFIG_NET_DSA_VITESSE_VSC73XX_SPI) += vitesse-vsc73xx-spi.o
obj-y += b53/
obj-y += hirschmann/
obj-y += lantiq/
obj-y += microchip/
obj-y += mv88e6xxx/
obj-y += ocelot/

7
drivers/net/dsa/lantiq/Kconfig Normal file
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@ -0,0 +1,7 @@
config NET_DSA_LANTIQ_GSWIP
tristate "Lantiq / Intel GSWIP"
depends on HAS_IOMEM
select NET_DSA_TAG_GSWIP
help
This enables support for the Lantiq / Intel GSWIP 2.1 found in
the xrx200 / VR9 SoC.

1
drivers/net/dsa/lantiq/Makefile Normal file
View File

@ -0,0 +1 @@
obj-$(CONFIG_NET_DSA_LANTIQ_GSWIP) += lantiq_gswip.o

54
drivers/net/dsa/lantiq_gswip.c → drivers/net/dsa/lantiq/lantiq_gswip.c
View File

@ -183,21 +183,29 @@ static void gswip_mii_mask(struct gswip_priv *priv, u32 clear, u32 set,
static void gswip_mii_mask_cfg(struct gswip_priv *priv, u32 clear, u32 set,
int port)
{
int reg_port;
/* MII_CFG register only exists for MII ports */
if (!(priv->hw_info->mii_ports & BIT(port)))
return;
gswip_mii_mask(priv, clear, set, GSWIP_MII_CFGp(port));
reg_port = port + priv->hw_info->mii_port_reg_offset;
gswip_mii_mask(priv, clear, set, GSWIP_MII_CFGp(reg_port));
}
static void gswip_mii_mask_pcdu(struct gswip_priv *priv, u32 clear, u32 set,
int port)
{
int reg_port;
/* MII_PCDU register only exists for MII ports */
if (!(priv->hw_info->mii_ports & BIT(port)))
return;
switch (port) {
reg_port = port + priv->hw_info->mii_port_reg_offset;
switch (reg_port) {
case 0:
gswip_mii_mask(priv, clear, set, GSWIP_MII_PCDU0);
break;
@ -278,6 +286,9 @@ static int gswip_mdio(struct gswip_priv *priv)
int err = 0;
mdio_np = of_get_compatible_child(switch_np, "lantiq,xrx200-mdio");
if (!mdio_np)
mdio_np = of_get_child_by_name(switch_np, "mdio");
if (!of_device_is_available(mdio_np))
goto out_put_node;
@ -616,6 +627,13 @@ static int gswip_setup(struct dsa_switch *ds)
/* Configure the MDIO Clock 2.5 MHz */
gswip_mdio_mask(priv, 0xff, 0x09, GSWIP_MDIO_MDC_CFG1);
/* bring up the mdio bus */
err = gswip_mdio(priv);
if (err) {
dev_err(priv->dev, "mdio bus setup failed\n");
return err;
}
/* Disable the xMII interface and clear it's isolation bit */
for (i = 0; i < priv->hw_info->max_ports; i++)
gswip_mii_mask_cfg(priv,
@ -1444,6 +1462,10 @@ static void gswip_phylink_mac_config(struct phylink_config *config,
miicfg |= GSWIP_MII_CFG_LDCLKDIS;
switch (state->interface) {
case PHY_INTERFACE_MODE_SGMII:
case PHY_INTERFACE_MODE_1000BASEX:
case PHY_INTERFACE_MODE_2500BASEX:
return;
case PHY_INTERFACE_MODE_MII:
case PHY_INTERFACE_MODE_INTERNAL:
miicfg |= GSWIP_MII_CFG_MODE_MIIM;
@ -1592,10 +1614,23 @@ static int gswip_get_sset_count(struct dsa_switch *ds, int port, int sset)
return ARRAY_SIZE(gswip_rmon_cnt);
}
static struct phylink_pcs *gswip_phylink_mac_select_pcs(struct phylink_config *config,
phy_interface_t interface)
{
struct dsa_port *dp = dsa_phylink_to_port(config);
struct gswip_priv *priv = dp->ds->priv;
if (priv->hw_info->mac_select_pcs)
return priv->hw_info->mac_select_pcs(config, interface);
return NULL;
}
static const struct phylink_mac_ops gswip_phylink_mac_ops = {
.mac_config = gswip_phylink_mac_config,
.mac_link_down = gswip_phylink_mac_link_down,
.mac_link_up = gswip_phylink_mac_link_up,
.mac_config = gswip_phylink_mac_config,
.mac_link_down = gswip_phylink_mac_link_down,
.mac_link_up = gswip_phylink_mac_link_up,
.mac_select_pcs = gswip_phylink_mac_select_pcs,
};
static const struct dsa_switch_ops gswip_switch_ops = {
@ -1945,13 +1980,6 @@ static int gswip_probe(struct platform_device *pdev)
"gphy fw probe failed\n");
}
/* bring up the mdio bus */
err = gswip_mdio(priv);
if (err) {
dev_err_probe(dev, err, "mdio probe failed\n");
goto gphy_fw_remove;
}
err = dsa_register_switch(priv->ds);
if (err) {
dev_err_probe(dev, err, "dsa switch registration failed\n");
@ -2010,6 +2038,7 @@ static const struct gswip_hw_info gswip_xrx200 = {
.max_ports = 7,
.allowed_cpu_ports = BIT(6),
.mii_ports = BIT(0) | BIT(1) | BIT(5),
.mii_port_reg_offset = 0,
.phylink_get_caps = gswip_xrx200_phylink_get_caps,
.pce_microcode = &gswip_pce_microcode,
.pce_microcode_size = ARRAY_SIZE(gswip_pce_microcode),
@ -2020,6 +2049,7 @@ static const struct gswip_hw_info gswip_xrx300 = {
.max_ports = 7,
.allowed_cpu_ports = BIT(6),
.mii_ports = BIT(0) | BIT(5),
.mii_port_reg_offset = 0,
.phylink_get_caps = gswip_xrx300_phylink_get_caps,
.pce_microcode = &gswip_pce_microcode,
.pce_microcode_size = ARRAY_SIZE(gswip_pce_microcode),

4
drivers/net/dsa/lantiq_gswip.h → drivers/net/dsa/lantiq/lantiq_gswip.h
View File

@ -4,6 +4,7 @@
#include <linux/clk.h>
#include <linux/mutex.h>
#include <linux/phylink.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#include <linux/reset.h>
@ -232,11 +233,14 @@ struct gswip_hw_info {
int max_ports;
unsigned int allowed_cpu_ports;
unsigned int mii_ports;
int mii_port_reg_offset;
const struct gswip_pce_microcode (*pce_microcode)[];
size_t pce_microcode_size;
enum dsa_tag_protocol tag_protocol;
void (*phylink_get_caps)(struct dsa_switch *ds, int port,
struct phylink_config *config);
struct phylink_pcs *(*mac_select_pcs)(struct phylink_config *config,
phy_interface_t interface);
};
struct gswip_gphy_fw {

0
drivers/net/dsa/lantiq_pce.h → drivers/net/dsa/lantiq/lantiq_pce.h
View File