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rtw88: coex: reduce magic number
Use macro definition to replace magic number. Signed-off-by: Ching-Te Ku <ku920601@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/20201109085909.9143-4-pkshih@realtek.com
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19ecd61d2c
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1d82c49764
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@ -145,13 +145,13 @@ static void rtw_coex_wl_ccklock_action(struct rtw_dev *rtwdev)
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coex_stat->cnt_wl[COEX_CNT_WL_5MS_NOEXTEND] = 0;
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if (coex_stat->cnt_wl[COEX_CNT_WL_5MS_NOEXTEND] == 7) {
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para[1] = 0x1; /* disable 5ms extend */
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para[1] = PARA1_H2C69_DIS_5MS;
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rtw_fw_bt_wifi_control(rtwdev, para[0], ¶[1]);
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coex_stat->wl_slot_extend = false;
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coex_stat->cnt_wl[COEX_CNT_WL_5MS_NOEXTEND] = 0;
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}
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} else if (!coex_stat->wl_slot_extend && coex_stat->wl_cck_lock) {
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para[1] = 0x0; /* enable 5ms extend */
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para[1] = PARA1_H2C69_EN_5MS;
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rtw_fw_bt_wifi_control(rtwdev, para[0], ¶[1]);
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coex_stat->wl_slot_extend = true;
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}
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@ -777,14 +777,14 @@ static void rtw_coex_coex_ctrl_owner(struct rtw_dev *rtwdev, bool wifi_control)
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static void rtw_coex_set_gnt_bt(struct rtw_dev *rtwdev, u8 state)
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{
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rtw_coex_write_indirect_reg(rtwdev, 0x38, 0xc000, state);
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rtw_coex_write_indirect_reg(rtwdev, 0x38, 0x0c00, state);
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rtw_coex_write_indirect_reg(rtwdev, LTE_COEX_CTRL, 0xc000, state);
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rtw_coex_write_indirect_reg(rtwdev, LTE_COEX_CTRL, 0x0c00, state);
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}
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static void rtw_coex_set_gnt_wl(struct rtw_dev *rtwdev, u8 state)
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{
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rtw_coex_write_indirect_reg(rtwdev, 0x38, 0x3000, state);
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rtw_coex_write_indirect_reg(rtwdev, 0x38, 0x0300, state);
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rtw_coex_write_indirect_reg(rtwdev, LTE_COEX_CTRL, 0x3000, state);
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rtw_coex_write_indirect_reg(rtwdev, LTE_COEX_CTRL, 0x0300, state);
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}
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static void rtw_coex_set_table(struct rtw_dev *rtwdev, u32 table0, u32 table1)
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@ -2916,14 +2916,16 @@ void rtw_coex_display_coex_info(struct rtw_dev *rtwdev, struct seq_file *m)
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score_board_BW = rtw_coex_read_scbd(rtwdev);
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score_board_WB = coex_stat->score_board;
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wl_reg_6c0 = rtw_read32(rtwdev, 0x6c0);
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wl_reg_6c4 = rtw_read32(rtwdev, 0x6c4);
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wl_reg_6c8 = rtw_read32(rtwdev, 0x6c8);
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wl_reg_6cc = rtw_read32(rtwdev, 0x6cc);
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wl_reg_778 = rtw_read32(rtwdev, 0x778);
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bt_hi_pri = rtw_read32(rtwdev, 0x770);
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bt_lo_pri = rtw_read32(rtwdev, 0x774);
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rtw_write8(rtwdev, 0x76e, 0xc);
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wl_reg_6c0 = rtw_read32(rtwdev, REG_BT_COEX_TABLE0);
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wl_reg_6c4 = rtw_read32(rtwdev, REG_BT_COEX_TABLE1);
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wl_reg_6c8 = rtw_read32(rtwdev, REG_BT_COEX_BRK_TABLE);
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wl_reg_6cc = rtw_read32(rtwdev, REG_BT_COEX_TABLE_H);
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wl_reg_778 = rtw_read8(rtwdev, REG_BT_STAT_CTRL);
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bt_hi_pri = rtw_read32(rtwdev, REG_BT_ACT_STATISTICS);
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bt_lo_pri = rtw_read32(rtwdev, REG_BT_ACT_STATISTICS_1);
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rtw_write8(rtwdev, REG_BT_COEX_ENH_INTR_CTRL,
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BIT_R_GRANTALL_WLMASK | BIT_STATIS_BT_EN);
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sys_lte = rtw_read8(rtwdev, 0x73);
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lte_coex = rtw_coex_read_indirect_reg(rtwdev, 0x38);
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bt_coex = rtw_coex_read_indirect_reg(rtwdev, 0x54);
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@ -466,6 +466,11 @@
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#define REG_BT_COEX_V2 0x0762
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#define BIT_GNT_BT_POLARITY BIT(12)
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#define BIT_LTE_COEX_EN BIT(7)
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#define REG_BT_COEX_ENH_INTR_CTRL 0x76E
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#define BIT_R_GRANTALL_WLMASK BIT(3)
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#define BIT_STATIS_BT_EN BIT(2)
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#define REG_BT_ACT_STATISTICS 0x0770
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#define REG_BT_ACT_STATISTICS_1 0x0774
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#define REG_BT_STAT_CTRL 0x0778
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#define REG_BT_TDMA_TIME 0x0790
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#define BIT_MASK_SAMPLE_RATE GENMASK(5, 0)
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@ -619,6 +624,9 @@
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#define REG_ANAPAR 0x1c30
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#define BIT_ANAPAR_BTPS BIT(22)
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#define REG_RSTB_SEL 0x1c38
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#define BIT_DAC_OFF_ENABLE BIT(4)
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#define BIT_PI_IGNORE_GNT_BT BIT(3)
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#define BIT_NOMASK_TXBT_ENABLE BIT(3)
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#define REG_HRCV_MSG 0x1cf
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@ -2153,7 +2153,7 @@ static void rtw8822c_coex_cfg_init(struct rtw_dev *rtwdev)
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rtw_write8_clr(rtwdev, REG_DUMMY_PAGE4_V1, BIT_BTCCA_CTRL);
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/* to avoid RF parameter error */
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rtw_write_rf(rtwdev, RF_PATH_B, 0x1, 0xfffff, 0x40000);
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rtw_write_rf(rtwdev, RF_PATH_B, RF_MODOPT, 0xfffff, 0x40000);
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}
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static void rtw8822c_coex_cfg_gnt_fix(struct rtw_dev *rtwdev)
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@ -2190,10 +2190,10 @@ static void rtw8822c_coex_cfg_gnt_fix(struct rtw_dev *rtwdev)
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* disable WL-S1 BB chage RF mode if GNT_BT
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* since RF TRx mask can do it
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*/
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rtw_write8_mask(rtwdev, 0x1c32, BIT(6), 1);
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rtw_write8_mask(rtwdev, 0x1c39, BIT(4), 0);
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rtw_write8_mask(rtwdev, 0x1c3b, BIT(4), 1);
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rtw_write8_mask(rtwdev, 0x4160, BIT(3), 1);
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rtw_write8_mask(rtwdev, REG_ANAPAR + 2, BIT_ANAPAR_BTPS >> 16, 1);
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rtw_write8_mask(rtwdev, REG_RSTB_SEL + 1, BIT_DAC_OFF_ENABLE, 0);
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rtw_write8_mask(rtwdev, REG_RSTB_SEL + 3, BIT_DAC_OFF_ENABLE, 1);
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rtw_write8_mask(rtwdev, REG_IGN_GNTBT4, BIT_PI_IGNORE_GNT_BT, 1);
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/* disable WL-S0 BB chage RF mode if wifi is at 5G,
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* or antenna path is separated
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@ -2201,26 +2201,32 @@ static void rtw8822c_coex_cfg_gnt_fix(struct rtw_dev *rtwdev)
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if (coex_stat->wl_coex_mode == COEX_WLINK_5G ||
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coex->under_5g || !efuse->share_ant) {
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if (coex_stat->kt_ver >= 3) {
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rtw_write8_mask(rtwdev, 0x1860, BIT(3), 0);
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rtw_write8_mask(rtwdev, 0x1ca7, BIT(3), 1);
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rtw_write8_mask(rtwdev, REG_IGN_GNT_BT1,
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BIT_PI_IGNORE_GNT_BT, 0);
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rtw_write8_mask(rtwdev, REG_NOMASK_TXBT,
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BIT_NOMASK_TXBT_ENABLE, 1);
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} else {
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rtw_write8_mask(rtwdev, 0x1860, BIT(3), 1);
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rtw_write8_mask(rtwdev, REG_IGN_GNT_BT1,
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BIT_PI_IGNORE_GNT_BT, 1);
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}
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} else {
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/* shared-antenna */
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rtw_write8_mask(rtwdev, 0x1860, BIT(3), 0);
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if (coex_stat->kt_ver >= 3)
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rtw_write8_mask(rtwdev, 0x1ca7, BIT(3), 0);
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rtw_write8_mask(rtwdev, REG_IGN_GNT_BT1,
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BIT_PI_IGNORE_GNT_BT, 0);
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if (coex_stat->kt_ver >= 3) {
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rtw_write8_mask(rtwdev, REG_NOMASK_TXBT,
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BIT_NOMASK_TXBT_ENABLE, 0);
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}
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}
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}
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static void rtw8822c_coex_cfg_gnt_debug(struct rtw_dev *rtwdev)
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{
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rtw_write8_mask(rtwdev, 0x66, BIT(4), 0);
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rtw_write8_mask(rtwdev, 0x67, BIT(0), 0);
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rtw_write8_mask(rtwdev, 0x42, BIT(3), 0);
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rtw_write8_mask(rtwdev, 0x65, BIT(7), 0);
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rtw_write8_mask(rtwdev, 0x73, BIT(3), 0);
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rtw_write8_mask(rtwdev, REG_PAD_CTRL1 + 2, BIT_BTGP_SPI_EN >> 16, 0);
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rtw_write8_mask(rtwdev, REG_PAD_CTRL1 + 3, BIT_BTGP_JTAG_EN >> 24, 0);
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rtw_write8_mask(rtwdev, REG_GPIO_MUXCFG + 2, BIT_FSPI_EN >> 16, 0);
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rtw_write8_mask(rtwdev, REG_PAD_CTRL1 + 1, BIT_LED1DIS >> 8, 0);
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rtw_write8_mask(rtwdev, REG_SYS_SDIO_CTRL + 3, BIT_DBG_GNT_WL_BT >> 24, 0);
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}
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static void rtw8822c_coex_cfg_rfe_type(struct rtw_dev *rtwdev)
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@ -2241,9 +2247,9 @@ static void rtw8822c_coex_cfg_rfe_type(struct rtw_dev *rtwdev)
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coex_rfe->wlg_at_btg = false;
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/* disable LTE coex in wifi side */
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rtw_coex_write_indirect_reg(rtwdev, 0x38, BIT_LTE_COEX_EN, 0x0);
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rtw_coex_write_indirect_reg(rtwdev, 0xa0, MASKLWORD, 0xffff);
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rtw_coex_write_indirect_reg(rtwdev, 0xa4, MASKLWORD, 0xffff);
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rtw_coex_write_indirect_reg(rtwdev, LTE_COEX_CTRL, BIT_LTE_COEX_EN, 0x0);
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rtw_coex_write_indirect_reg(rtwdev, LTE_WL_TRX_CTRL, MASKLWORD, 0xffff);
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rtw_coex_write_indirect_reg(rtwdev, LTE_BT_TRX_CTRL, MASKLWORD, 0xffff);
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}
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static void rtw8822c_coex_cfg_wl_tx_power(struct rtw_dev *rtwdev, u8 wl_pwr)
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@ -2269,15 +2275,17 @@ static void rtw8822c_coex_cfg_wl_rx_gain(struct rtw_dev *rtwdev, bool low_gain)
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if (coex_dm->cur_wl_rx_low_gain_en) {
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/* set Rx filter corner RCK offset */
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rtw_write_rf(rtwdev, RF_PATH_A, 0xde, 0xfffff, 0x22);
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rtw_write_rf(rtwdev, RF_PATH_A, 0x1d, 0xfffff, 0x36);
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rtw_write_rf(rtwdev, RF_PATH_B, 0xde, 0xfffff, 0x22);
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rtw_write_rf(rtwdev, RF_PATH_B, 0x1d, 0xfffff, 0x36);
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rtw_write_rf(rtwdev, RF_PATH_A, RF_RCKD, RFREG_MASK, 0x22);
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rtw_write_rf(rtwdev, RF_PATH_A, RF_RCK, RFREG_MASK, 0x36);
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rtw_write_rf(rtwdev, RF_PATH_B, RF_RCKD, RFREG_MASK, 0x22);
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rtw_write_rf(rtwdev, RF_PATH_B, RF_RCK, RFREG_MASK, 0x36);
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} else {
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/* set Rx filter corner RCK offset */
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rtw_write_rf(rtwdev, RF_PATH_A, 0xde, 0xfffff, 0x20);
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rtw_write_rf(rtwdev, RF_PATH_A, 0x1d, 0xfffff, 0x0);
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rtw_write_rf(rtwdev, RF_PATH_B, 0x1d, 0xfffff, 0x0);
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rtw_write_rf(rtwdev, RF_PATH_A, RF_RCKD, RFREG_MASK, 0x20);
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rtw_write_rf(rtwdev, RF_PATH_A, RF_RCK, RFREG_MASK, 0x0);
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rtw_write_rf(rtwdev, RF_PATH_B, RF_RCKD, RFREG_MASK, 0x20);
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rtw_write_rf(rtwdev, RF_PATH_B, RF_RCK, RFREG_MASK, 0x0);
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}
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}
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