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arm64: dts: ti: var-som-am62p: Refactor IPC configuration into common dtsi
Update the VAR-SOM-AM62P dtsi to align with the refactor introduced by k3-am62p-ti-ipc-firmware.dtsi common file, allowing to remove the IPC nodes from the board file including the new common dtsi. No functional changes intended. Signed-off-by: Stefano Radaelli <stefano.radaelli21@gmail.com> Link: https://patch.msgid.link/20251003125031.30539-2-stefano.radaelli21@gmail.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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@ -63,18 +63,6 @@ rtos_ipc_memory_region: rtos-ipc-memory@9b500000 {
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no-map;
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};
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mcu_r5fss0_core0_dma_memory_region: mcu-r5fss-dma-memory-region@9b800000 {
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compatible = "shared-dma-pool";
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reg = <0x00 0x9b800000 0x00 0x00100000>;
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no-map;
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};
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mcu_r5fss0_core0_memory_region: mcu-r5fss-memory-region@9b900000 {
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compatible = "shared-dma-pool";
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reg = <0x00 0x9b900000 0x00 0x00f00000>;
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no-map;
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};
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wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 {
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compatible = "shared-dma-pool";
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reg = <0x00 0x9c800000 0x00 0x00100000>;
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@ -320,44 +308,6 @@ &usbss1 {
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ti,vbus-divider;
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};
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&mailbox0_cluster0 {
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status = "okay";
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mbox_r5_0: mbox-r5-0 {
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ti,mbox-rx = <0 0 0>;
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ti,mbox-tx = <1 0 0>;
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};
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};
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&mailbox0_cluster1 {
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status = "okay";
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mbox_mcu_r5_0: mbox-mcu-r5-0 {
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ti,mbox-rx = <0 0 0>;
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ti,mbox-tx = <1 0 0>;
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};
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};
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&mcu_r5fss0 {
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status = "okay";
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};
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&mcu_r5fss0_core0 {
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mboxes = <&mailbox0_cluster1 &mbox_mcu_r5_0>;
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memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
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<&mcu_r5fss0_core0_memory_region>;
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};
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&wkup_r5fss0 {
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status = "okay";
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};
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&wkup_r5fss0_core0 {
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mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
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memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
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<&wkup_r5fss0_core0_memory_region>;
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};
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/* mcu_gpio0 and mcu_gpio_intr are reserved for mcu firmware usage */
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&mcu_gpio0 {
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status = "reserved";
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@ -385,3 +335,5 @@ &main_uart1 {
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/* Main UART1 is used by TIFS firmware */
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status = "reserved";
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};
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#include "k3-am62p-ti-ipc-firmware.dtsi"
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