drm/amd/pm: change pp_dpm_sclk/mclk/fclk attribute is RO for aldebaran

the following clock is only support voltage DPM, change attribute to RO:
1. pp_dpm_sclk
2. pp_dpm_mclk
3. pp_dpm_fclk

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Kevin Wang 2021-08-11 16:10:26 +08:00 committed by Alex Deucher
parent becf6c9552
commit 1d0e622f8d

View File

@ -2094,14 +2094,19 @@ static int default_attr_update(struct amdgpu_device *adev, struct amdgpu_device_
*states = ATTR_STATE_UNSUPPORTED;
}
if (asic_type == CHIP_ARCTURUS) {
/* Arcturus does not support standalone mclk/socclk/fclk level setting */
switch (asic_type) {
case CHIP_ARCTURUS:
case CHIP_ALDEBARAN:
/* the Mi series card does not support standalone mclk/socclk/fclk level setting */
if (DEVICE_ATTR_IS(pp_dpm_mclk) ||
DEVICE_ATTR_IS(pp_dpm_socclk) ||
DEVICE_ATTR_IS(pp_dpm_fclk)) {
dev_attr->attr.mode &= ~S_IWUGO;
dev_attr->store = NULL;
}
break;
default:
break;
}
if (DEVICE_ATTR_IS(pp_dpm_dcefclk)) {