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drm/i915/gvt: Swap read and write checks
The function intel_gvt_i2c_handle_aux_ch_write currently does not support the DP_AUX_I2C_WRITE operation. Notably, we check if op & 0x1 == DP_AUX_I2C_WRITE (one), and if it does not, assert that op & 0x1 == DP_AUX_I2C_READ (zero). This is unnecessary because if op & 0x1 != 1, then op & 0x1 == 0. But beyond that, it probably makes more sense to check for the condition that is implemented, rather than check for the condition that is not. Swap the conditions. We can also get rid of the unnecessary drm_WARN_ON while we're here. Suggested-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Link: https://patch.msgid.link/20260204161945.8127-2-jonathan.cavitt@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
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@ -535,16 +535,7 @@ void intel_gvt_i2c_handle_aux_ch_write(struct intel_vgpu *vgpu,
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i2c_edid->edid_available = true;
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}
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}
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} else if ((op & 0x1) == DP_AUX_I2C_WRITE) {
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/* TODO
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* We only support EDID reading from I2C_over_AUX. And
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* we do not expect the index mode to be used. Right now
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* the WRITE operation is ignored. It is good enough to
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* support the gfx driver to do EDID access.
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*/
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} else {
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if (drm_WARN_ON(&i915->drm, (op & 0x1) != DP_AUX_I2C_READ))
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return;
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} else if ((op & 0x1) == DP_AUX_I2C_READ) {
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if (drm_WARN_ON(&i915->drm, msg_length != 4))
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return;
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if (i2c_edid->edid_available && i2c_edid->target_selected) {
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@ -553,6 +544,13 @@ void intel_gvt_i2c_handle_aux_ch_write(struct intel_vgpu *vgpu,
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aux_data_for_write = (val << 16);
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} else
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aux_data_for_write = (0xff << 16);
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} else {
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/* TODO
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* We only support EDID reading from I2C_over_AUX. And
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* we do not expect the index mode to be used. Right now
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* the WRITE operation is ignored. It is good enough to
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* support the gfx driver to do EDID access.
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*/
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}
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/* write the return value in AUX_CH_DATA reg which includes:
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* ACK of I2C_WRITE
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