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drm/xe/mcr: Take vcs1/vecs1 into account for first media slice

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vcs1 and vecs1 may also be present on the first media slice, so take
vcs1/vecs1 also into account when determining if the first media slice is
absent.

Bspec: 67103, 77977

Cc: Gustavo Sousa <gustavo.sousa@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patch.msgid.link/20260729230645.3052178-2-ashutosh.dixit@intel.com
(cherry picked from commit 1dff677209f6ed48779f4ac2ba130a207540a435)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
This commit is contained in:
Ashutosh Dixit 2026-07-29 16:06:44 -07:00 committed by Rodrigo Vivi
parent 63fe9ce2f2
commit 1c4d0c45d7
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GPG Key ID: FA625F640EEB13CA
1 changed files with 7 additions and 2 deletions
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9
drivers/gpu/drm/xe/xe_gt_mcr.c
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@ -443,11 +443,16 @@ static void init_steering_dss(struct xe_gt *gt)
static void init_steering_oaddrm(struct xe_gt *gt)
{
u64 hwe_mask = XE_HW_ENGINE_VCS0 | XE_HW_ENGINE_VECS0;
/* TODO: Add 'VD per SCMI' and 'VE per SCMI' values into 'struct xe_media_desc' */
if (MEDIA_VERx100(gt_to_xe(gt)) >= 3500)
hwe_mask |= XE_HW_ENGINE_VCS1 | XE_HW_ENGINE_VECS1;
/*
* First instance is only terminated if the entire first media slice
* is absent (i.e., no VCS0 or VECS0).
* is absent (i.e., no engines in hwe_mask).
*/
if (gt->info.engine_mask & (XE_HW_ENGINE_VCS0 | XE_HW_ENGINE_VECS0))
if (gt->info.engine_mask & hwe_mask)
gt->steering[OADDRM].group_target = 0;
else
gt->steering[OADDRM].group_target = 1;