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dt-bindings: display: imx: Add i.MX8qxp Display Controller processing units
Freescale i.MX8qxp Display Controller is implemented as construction set of building blocks with unified concept and standardized interfaces. Document all existing processing units. Signed-off-by: Liu Ying <victor.liu@nxp.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250414035028.1561475-2-victor.liu@nxp.com
This commit is contained in:
Liu Ying
parent
1f372c1fc6
commit
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-blitblend.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Freescale i.MX8qxp Display Controller Blit Blend Unit
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description:
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Combines two input frames to a single output frame, all frames having the
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same dimension.
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maintainers:
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- Liu Ying <victor.liu@nxp.com>
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properties:
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compatible:
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const: fsl,imx8qxp-dc-blitblend
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reg:
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maxItems: 2
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reg-names:
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items:
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- const: pec
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- const: cfg
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required:
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- compatible
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- reg
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- reg-names
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additionalProperties: false
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examples:
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- |
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blitblend@56180920 {
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compatible = "fsl,imx8qxp-dc-blitblend";
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reg = <0x56180920 0x10>, <0x56183c00 0x3c>;
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reg-names = "pec", "cfg";
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};
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-clut.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Freescale i.MX8qxp Display Controller Color Lookup Table
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description: |
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The unit implements 3 look-up tables with 256 x 10 bit entries each. These
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can be used for different kinds of applications. From 10-bit input values
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only upper 8 bits are used.
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The unit supports color lookup, index lookup, dithering and alpha masking.
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maintainers:
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- Liu Ying <victor.liu@nxp.com>
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properties:
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compatible:
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const: fsl,imx8qxp-dc-clut
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reg:
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maxItems: 2
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reg-names:
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items:
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- const: pec
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- const: cfg
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required:
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- compatible
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- reg
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- reg-names
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additionalProperties: false
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examples:
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- |
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clut@56180880 {
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compatible = "fsl,imx8qxp-dc-clut";
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reg = <0x56180880 0x10>, <0x56182400 0x404>;
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reg-names = "pec", "cfg";
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};
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-constframe.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Freescale i.MX8qxp Display Controller Constant Frame
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description: |
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The Constant Frame unit is used instead of a Fetch unit where generation of
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constant color frames only is sufficient. This is the case for the background
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planes of content and safety streams in a Display Controller.
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The color can be setup to any RGBA value.
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maintainers:
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- Liu Ying <victor.liu@nxp.com>
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properties:
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compatible:
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const: fsl,imx8qxp-dc-constframe
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reg:
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maxItems: 2
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reg-names:
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items:
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- const: pec
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- const: cfg
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required:
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- compatible
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- reg
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- reg-names
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additionalProperties: false
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examples:
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- |
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constframe@56180960 {
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compatible = "fsl,imx8qxp-dc-constframe";
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reg = <0x56180960 0xc>, <0x56184400 0x20>;
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reg-names = "pec", "cfg";
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};
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-dither.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Freescale i.MX8qxp Display Controller Dither Unit
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description: |
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The unit can increase the physical color resolution of a display from 5, 6, 7
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or 8 bits per RGB channel to a virtual resolution of 10 bits. The physical
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resolution can be set individually for each channel.
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The resolution is increased by mixing the two physical colors that are nearest
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to the virtual color code in a variable ratio either by time (temporal
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dithering) or by position (spatial dithering).
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An optimized algorithm for temporal dithering minimizes noise artifacts on the
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output image.
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The dither operation can be individually enabled or disabled for each pixel
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using the alpha input bit.
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maintainers:
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- Liu Ying <victor.liu@nxp.com>
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properties:
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compatible:
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const: fsl,imx8qxp-dc-dither
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reg:
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maxItems: 1
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required:
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- compatible
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- reg
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additionalProperties: false
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examples:
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- |
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dither@5618c400 {
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compatible = "fsl,imx8qxp-dc-dither";
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reg = <0x5618c400 0x14>;
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};
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-extdst.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Freescale i.MX8qxp Display Controller External Destination Interface
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description: |
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The External Destination unit is the interface between the internal pixel
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processing pipeline of the Pixel Engine, which is 30-bit RGB plus 8-bit Alpha,
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and a Display Engine.
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It comprises the following built-in Gamma apply function.
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+------X-----------------------+
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| | ExtDst Unit |
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| V |
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| +-------+ |
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| | Gamma | |
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| +-------+ |
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| | |
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| V +
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+------X-----------------------+
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The output format is 24-bit RGB plus 1-bit Alpha. Conversion from 10 to 8
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bits is done by LSBit truncation. Alpha output bit is 1 for input 255, 0
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otherwise.
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maintainers:
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- Liu Ying <victor.liu@nxp.com>
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properties:
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compatible:
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const: fsl,imx8qxp-dc-extdst
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reg:
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maxItems: 2
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reg-names:
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items:
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- const: pec
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- const: cfg
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interrupts:
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maxItems: 3
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interrupt-names:
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items:
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- const: shdload
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- const: framecomplete
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- const: seqcomplete
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required:
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- compatible
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- reg
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- reg-names
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- interrupts
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- interrupt-names
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additionalProperties: false
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examples:
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- |
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extdst@56180980 {
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compatible = "fsl,imx8qxp-dc-extdst";
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reg = <0x56180980 0x1c>, <0x56184800 0x28>;
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reg-names = "pec", "cfg";
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interrupt-parent = <&dc0_intc>;
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interrupts = <3>, <4>, <5>;
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interrupt-names = "shdload", "framecomplete", "seqcomplete";
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};
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-fetchunit.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Freescale i.MX8qxp Display Controller Fetch Unit
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description: |
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The Fetch Unit is the interface between the AXI bus for source buffer access
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and the internal pixel processing pipeline, which is 30-bit RGB plus 8-bit
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Alpha.
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It is used to generate foreground planes in Display Controllers and source
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planes in Blit Engines, and comprises the following built-in functions to
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convert a wide range of frame buffer types.
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+---------X-----------------------------------------+
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| | Fetch Unit |
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| V |
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| +---------+ |
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| | | |
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| | Decode | Decompression [Decode] |
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| | | |
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| +---------+ |
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| | |
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| V |
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| +---------+ |
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| | Clip & | Clip Window [All] |
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| | Overlay | Plane composition [Layer, Warp] |
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| | | |
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| +---------+ |
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| | |
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| V |
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| +---------+ |
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| | Re- | Flip/Rotate/Repl./Drop [All] |
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X--> | sample | Perspective/Affine warping [Persp] |
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| | | | Arbitrary warping [Warp, Persp] |
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| | +---------+ |
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| | | |
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| | V |
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| | +---------+ |
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| | | | |
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| | | Palette | Color Palette [Layer, Decode] |
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| | | | |
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| | +---------+ |
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| | | |
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| | V |
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| | +---------+ |
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| | | Extract | Raw to RGBA/YUV [All] |
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| | | & | Bit width expansion [All] |
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| | | Expand | |
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| | +---------+ |
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| | | |
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| | V |
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| | +---------+ |
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| | | | Planar to packed |
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| |->| Combine | [Decode, Warp, Persp] |
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| | | | |
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| | +---------+ |
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| | | |
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| | V |
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| | +---------+ |
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| | | | YUV422 to YUV444 |
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| | | Chroma | [Decode, Persp] |
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| | | | |
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| | +---------+ |
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| | | |
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| | V |
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| | +---------+ |
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| | | | YUV to RGB |
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| | | Color | [Warp, Persp, Decode, Layer] |
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| | | | |
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| | +---------+ |
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| | | |
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| | V |
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| | +---------+ |
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| | | | Gamma removal |
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| | | Gamma | [Warp, Persp, Decode, Layer] |
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| | | | |
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| | +---------+ |
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| | | |
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| | V |
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| | +---------+ |
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| | | | Alpla multiply, RGB pre-multiply |
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| ->| Multiply| [Warp, Persp, Decode, Layer] |
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| | | |
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| --------- |
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| | |
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| V |
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| +---------+ |
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| | | Bilinear filter |
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| | Filter | [Warp, Persp] |
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| | | |
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| +---------+ |
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| | |
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| V |
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+---------X-----------------------------------------+
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Note that different derivatives of the Fetch Unit exist. Each implements a
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specific subset only of the pipeline stages shown above. Restrictions for the
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units are specified in [square brackets].
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maintainers:
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- Liu Ying <victor.liu@nxp.com>
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properties:
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compatible:
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enum:
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- fsl,imx8qxp-dc-fetchdecode
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- fsl,imx8qxp-dc-fetcheco
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- fsl,imx8qxp-dc-fetchlayer
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- fsl,imx8qxp-dc-fetchwarp
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reg:
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maxItems: 2
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reg-names:
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items:
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- const: pec
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- const: cfg
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fsl,prg:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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Optional Prefetch Resolve Gasket associated with the Fetch Unit.
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required:
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- compatible
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- reg
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- reg-names
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additionalProperties: false
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examples:
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- |
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fetchlayer@56180ac0 {
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compatible = "fsl,imx8qxp-dc-fetchlayer";
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reg = <0x56180ac0 0xc>, <0x56188400 0x404>;
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reg-names = "pec", "cfg";
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};
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-filter.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Freescale i.MX8qxp Display Controller Filter Unit
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description: |
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5x5 FIR filter with 25 programmable coefficients.
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Typical applications are image blurring, sharpening or support for edge
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detection algorithms.
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maintainers:
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- Liu Ying <victor.liu@nxp.com>
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properties:
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compatible:
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const: fsl,imx8qxp-dc-filter
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reg:
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maxItems: 2
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reg-names:
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items:
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- const: pec
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- const: cfg
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required:
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- compatible
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- reg
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- reg-names
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additionalProperties: false
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examples:
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- |
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filter@56180900 {
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compatible = "fsl,imx8qxp-dc-filter";
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reg = <0x56180900 0x10>, <0x56183800 0x30>;
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reg-names = "pec", "cfg";
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};
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-framegen.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Freescale i.MX8qxp Display Controller Frame Generator
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description:
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The Frame Generator (FrameGen) module generates a programmable video timing
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and optionally allows to synchronize the generated video timing to external
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synchronization signals.
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maintainers:
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- Liu Ying <victor.liu@nxp.com>
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properties:
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compatible:
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const: fsl,imx8qxp-dc-framegen
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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interrupts:
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maxItems: 8
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interrupt-names:
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items:
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- const: int0
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- const: int1
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- const: int2
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- const: int3
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- const: primsync_on
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- const: primsync_off
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- const: secsync_on
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- const: secsync_off
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required:
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- compatible
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- reg
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- clocks
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- interrupts
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- interrupt-names
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/imx8-lpcg.h>
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#include <dt-bindings/firmware/imx/rsrc.h>
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framegen@5618b800 {
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compatible = "fsl,imx8qxp-dc-framegen";
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reg = <0x5618b800 0x98>;
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clocks = <&dc0_disp_lpcg IMX_LPCG_CLK_0>;
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interrupt-parent = <&dc0_intc>;
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interrupts = <18>, <19>, <20>, <21>, <41>, <42>, <43>, <44>;
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interrupt-names = "int0", "int1", "int2", "int3",
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"primsync_on", "primsync_off",
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"secsync_on", "secsync_off";
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};
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@ -0,0 +1,32 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
|
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---
|
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$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-gammacor.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Freescale i.MX8qxp Display Controller Gamma Correction Unit
|
||||
|
||||
description: The unit supports non-linear color transformation.
|
||||
|
||||
maintainers:
|
||||
- Liu Ying <victor.liu@nxp.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: fsl,imx8qxp-dc-gammacor
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
gammacor@5618c000 {
|
||||
compatible = "fsl,imx8qxp-dc-gammacor";
|
||||
reg = <0x5618c000 0x20>;
|
||||
};
|
||||
|
|
@ -0,0 +1,39 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-layerblend.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Freescale i.MX8qxp Display Controller Layer Blend Unit
|
||||
|
||||
description: Combines two input frames to a single output frame.
|
||||
|
||||
maintainers:
|
||||
- Liu Ying <victor.liu@nxp.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: fsl,imx8qxp-dc-layerblend
|
||||
|
||||
reg:
|
||||
maxItems: 2
|
||||
|
||||
reg-names:
|
||||
items:
|
||||
- const: pec
|
||||
- const: cfg
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- reg-names
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
layerblend@56180ba0 {
|
||||
compatible = "fsl,imx8qxp-dc-layerblend";
|
||||
reg = <0x56180ba0 0x10>, <0x5618a400 0x20>;
|
||||
reg-names = "pec", "cfg";
|
||||
};
|
||||
|
|
@ -0,0 +1,44 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-matrix.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Freescale i.MX8qxp Display Controller Color Matrix
|
||||
|
||||
description:
|
||||
The unit supports linear color transformation, alpha pre-multiply and
|
||||
alpha masking.
|
||||
|
||||
maintainers:
|
||||
- Liu Ying <victor.liu@nxp.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: fsl,imx8qxp-dc-matrix
|
||||
|
||||
reg:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
reg-names:
|
||||
oneOf:
|
||||
- const: cfg # matrix in display engine
|
||||
- items: # matrix in pixel engine
|
||||
- const: pec
|
||||
- const: cfg
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- reg-names
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
matrix@5618bc00 {
|
||||
compatible = "fsl,imx8qxp-dc-matrix";
|
||||
reg = <0x5618bc00 0x3c>;
|
||||
reg-names = "cfg";
|
||||
};
|
||||
|
|
@ -0,0 +1,43 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-rop.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Freescale i.MX8qxp Display Controller Raster Operation Unit
|
||||
|
||||
description: |
|
||||
The unit can combine up to three input frames to a single output frame, all
|
||||
having the same dimension.
|
||||
|
||||
The unit supports logic operations, arithmetic operations and packing.
|
||||
|
||||
maintainers:
|
||||
- Liu Ying <victor.liu@nxp.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: fsl,imx8qxp-dc-rop
|
||||
|
||||
reg:
|
||||
maxItems: 2
|
||||
|
||||
reg-names:
|
||||
items:
|
||||
- const: pec
|
||||
- const: cfg
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- reg-names
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
rop@56180860 {
|
||||
compatible = "fsl,imx8qxp-dc-rop";
|
||||
reg = <0x56180860 0x10>, <0x56182000 0x20>;
|
||||
reg-names = "pec", "cfg";
|
||||
};
|
||||
|
|
@ -0,0 +1,34 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-safety.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Freescale i.MX8qxp Display Controller Safety Unit
|
||||
|
||||
description:
|
||||
The unit allows corresponding processing units to be configured in a path
|
||||
leading to multiple endpoints.
|
||||
|
||||
maintainers:
|
||||
- Liu Ying <victor.liu@nxp.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: fsl,imx8qxp-dc-safety
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
safety@56180800 {
|
||||
compatible = "fsl,imx8qxp-dc-safety";
|
||||
reg = <0x56180800 0x1c>;
|
||||
};
|
||||
|
|
@ -0,0 +1,83 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-scaling-engine.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Freescale i.MX8qxp Display Controller Scaling Engine
|
||||
|
||||
description: |
|
||||
The unit can change the dimension of the input frame by nearest or linear
|
||||
re-sampling with 1/32 sub pixel precision.
|
||||
|
||||
Internally it consist of two independent blocks for horizontal and vertical
|
||||
scaling. The sequence of both operations is arbitrary.
|
||||
|
||||
Any frame dimensions between 1 and 16384 pixels in width and height are
|
||||
supported, except that the vertical scaler has a frame width maximum
|
||||
depending of the system's functional limitations.
|
||||
|
||||
In general all scale factors are supported inside the supported frame
|
||||
dimensions. In range of scale factors 1/16..16 the filtered output colors
|
||||
are LSBit precise (e.g. DC ripple free).
|
||||
|
||||
+-----------+
|
||||
| Line |
|
||||
| Buffer |
|
||||
+-----------+
|
||||
^
|
||||
|
|
||||
V
|
||||
|\ +-----------+
|
||||
------+ | | |
|
||||
| | +-->| Vertical |----
|
||||
| ----+ | | Scaler | |
|
||||
| | |/ +-----------+ |
|
||||
| | |
|
||||
| | |
|
||||
| | | |\
|
||||
| ------------- -------------+-----+ |
|
||||
Input --+ X | +--> Output
|
||||
| ------------- -------------+-----+ |
|
||||
| | | |/
|
||||
| | |
|
||||
| | |\ +-----------+ |
|
||||
| ----+ | | | |
|
||||
| | +-->| Horizontal|----
|
||||
------+ | | Scaler |
|
||||
|/ +-----------+
|
||||
|
||||
The unit supports downscaling, upscaling, sub pixel translation and bob
|
||||
de-interlacing.
|
||||
|
||||
maintainers:
|
||||
- Liu Ying <victor.liu@nxp.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- fsl,imx8qxp-dc-hscaler
|
||||
- fsl,imx8qxp-dc-vscaler
|
||||
|
||||
reg:
|
||||
maxItems: 2
|
||||
|
||||
reg-names:
|
||||
items:
|
||||
- const: pec
|
||||
- const: cfg
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- reg-names
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
hscaler@561808c0 {
|
||||
compatible = "fsl,imx8qxp-dc-hscaler";
|
||||
reg = <0x561808c0 0x10>, <0x56183000 0x18>;
|
||||
reg-names = "pec", "cfg";
|
||||
};
|
||||
|
|
@ -0,0 +1,53 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-signature.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Freescale i.MX8qxp Display Controller Signature Unit
|
||||
|
||||
description: |
|
||||
In order to control the correctness of display output, signature values can
|
||||
be computed for each frame and compared against reference values. In case of
|
||||
a mismatch (signature violation) a HW event can be triggered, for example a
|
||||
SW interrupt.
|
||||
|
||||
This unit supports signature computation, reference check, evaluation windows,
|
||||
alpha masking and panic modes.
|
||||
|
||||
maintainers:
|
||||
- Liu Ying <victor.liu@nxp.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: fsl,imx8qxp-dc-signature
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 3
|
||||
|
||||
interrupt-names:
|
||||
items:
|
||||
- const: shdload
|
||||
- const: valid
|
||||
- const: error
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
signature@5618d000 {
|
||||
compatible = "fsl,imx8qxp-dc-signature";
|
||||
reg = <0x5618d000 0x140>;
|
||||
interrupt-parent = <&dc0_intc>;
|
||||
interrupts = <22>, <23>, <24>;
|
||||
interrupt-names = "shdload", "valid", "error";
|
||||
};
|
||||
|
|
@ -0,0 +1,96 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-store.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Freescale i.MX8qxp Display Controller Store Unit
|
||||
|
||||
description: |
|
||||
The Store unit is the interface between the internal pixel processing
|
||||
pipeline, which is 30-bit RGB plus 8-bit Alpha, and the AXI bus for
|
||||
destination buffer access. It is used for the destination of Blit Engines.
|
||||
It comprises a set of built-in functions to generate a wide range of buffer
|
||||
formats. Note, that these are exactly inverse to corresponding functions in
|
||||
the Fetch Unit.
|
||||
|
||||
+------X-------------------------+
|
||||
| | Store Unit |
|
||||
| V |
|
||||
| +-------+ |
|
||||
| | Gamma | Gamma apply |
|
||||
| +-------+ |
|
||||
| | |
|
||||
| V |
|
||||
| +-------+ |
|
||||
| | Color | RGB to YUV |
|
||||
| +-------+ |
|
||||
| | |
|
||||
| V |
|
||||
| +-------+ |
|
||||
| | Chroma| YUV444 to 422 |
|
||||
| +-------+ |
|
||||
| | |
|
||||
| V |
|
||||
| +-------+ |
|
||||
| | Reduce| Bit width reduction |
|
||||
| | | dithering |
|
||||
| +-------+ |
|
||||
| | |
|
||||
| V |
|
||||
| +-------+ |
|
||||
| | Pack | RGBA/YUV to RAW |
|
||||
| | Encode| or Compression |
|
||||
| +-------+ |
|
||||
| | |
|
||||
| V |
|
||||
+------X-------------------------+
|
||||
|
||||
maintainers:
|
||||
- Liu Ying <victor.liu@nxp.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: fsl,imx8qxp-dc-store
|
||||
|
||||
reg:
|
||||
maxItems: 2
|
||||
|
||||
reg-names:
|
||||
items:
|
||||
- const: pec
|
||||
- const: cfg
|
||||
|
||||
interrupts:
|
||||
maxItems: 3
|
||||
|
||||
interrupt-names:
|
||||
items:
|
||||
- const: shdload
|
||||
- const: framecomplete
|
||||
- const: seqcomplete
|
||||
|
||||
fsl,lts:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description:
|
||||
Optional Linear Tile Store associated with the Store Unit.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- reg-names
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
store@56180940 {
|
||||
compatible = "fsl,imx8qxp-dc-store";
|
||||
reg = <0x56180940 0x1c>, <0x56184000 0x5c>;
|
||||
reg-names = "pec", "cfg";
|
||||
interrupt-parent = <&dc0_intc>;
|
||||
interrupts = <0>, <1>, <2>;
|
||||
interrupt-names = "shdload", "framecomplete", "seqcomplete";
|
||||
};
|
||||
|
|
@ -0,0 +1,45 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-tcon.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Freescale i.MX8qxp Display Controller Timing Controller
|
||||
|
||||
description:
|
||||
The TCon can generate a wide range of customized synchronization signals and
|
||||
does the mapping of the color bits to the output.
|
||||
|
||||
maintainers:
|
||||
- Liu Ying <victor.liu@nxp.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: fsl,imx8qxp-dc-tcon
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
port:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: video output
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- port
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
tcon@5618c800 {
|
||||
compatible = "fsl,imx8qxp-dc-tcon";
|
||||
reg = <0x5618c800 0x588>;
|
||||
|
||||
port {
|
||||
dc0_disp0_dc0_pixel_combiner_ch0: endpoint {
|
||||
remote-endpoint = <&dc0_pixel_combiner_ch0_dc0_disp0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
Loading…
Reference in New Issue
Block a user