Merge branch 'riscv-spacemit-add-ethernet-support-for-k3'

Inochi Amaoto says:

====================
riscv: spacemit: Add ethernet support for K3

Add initial support for ethernet controller of the Spacemit K3 SoC.
This ethernet controller is almost a standard Synopsys DesignWare
MAC (version 5.40a). This controller require a syscon device to
configure some basic features, like interface type and internal delay.
====================

Link: https://patch.msgid.link/20260316010041.164360-1-inochiama@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Jakub Kicinski 2026-03-17 20:18:43 -07:00
commit 1c0714c745
7 changed files with 351 additions and 0 deletions

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@ -109,6 +109,7 @@ properties:
- snps,dwmac-5.10a
- snps,dwmac-5.20
- snps,dwmac-5.30a
- snps,dwmac-5.40a
- snps,dwxgmac
- snps,dwxgmac-2.10
- sophgo,sg2042-dwmac
@ -656,6 +657,7 @@ allOf:
- snps,dwmac-5.10a
- snps,dwmac-5.20
- snps,dwmac-5.30a
- snps,dwmac-5.40a
- snps,dwxgmac
- snps,dwxgmac-2.10
- st,spear600-gmac

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@ -0,0 +1,102 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/spacemit,k3-dwmac.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Spacemit K3 DWMAC glue layer
maintainers:
- Inochi Amaoto <inochiama@gmail.com>
select:
properties:
compatible:
contains:
const: spacemit,k3-dwmac
required:
- compatible
properties:
compatible:
items:
- const: spacemit,k3-dwmac
- const: snps,dwmac-5.40a
reg:
maxItems: 1
clocks:
items:
- description: GMAC application clock
- description: PTP clock
- description: TX clock
clock-names:
items:
- const: stmmaceth
- const: ptp_ref
- const: tx
interrupts:
minItems: 1
items:
- description: MAC interrupt
- description: MAC wake interrupt
interrupt-names:
minItems: 1
items:
- const: macirq
- const: eth_wake_irq
resets:
maxItems: 1
reset-names:
const: stmmaceth
spacemit,apmu:
$ref: /schemas/types.yaml#/definitions/phandle-array
items:
- items:
- description: phandle to the syscon node which control the glue register
- description: offset of the control register
- description: offset of the dline register
description:
A phandle to syscon with offset to control registers for this MAC
required:
- compatible
- reg
- clocks
- clock-names
- interrupts
- interrupt-names
- resets
- reset-names
- spacemit,apmu
allOf:
- $ref: snps,dwmac.yaml#
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
ethernet@cac80000 {
compatible = "spacemit,k3-dwmac", "snps,dwmac-5.40a";
reg = <0xcac80000 0x2000>;
clocks = <&syscon_apmu 66>, <&syscon_apmu 68>,
<&syscon_apmu 69>;
clock-names = "stmmaceth", "ptp_ref", "tx";
interrupts = <131 IRQ_TYPE_LEVEL_HIGH>, <276 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq", "eth_wake_irq";
phy-mode = "rgmii-id";
phy-handle = <&phy0>;
resets = <&syscon_apmu 67>;
reset-names = "stmmaceth";
spacemit,apmu = <&syscon_apmu 0x384 0x38c>;
};

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@ -24827,6 +24827,12 @@ W: https://linuxtv.org
Q: http://patchwork.linuxtv.org/project/linux-media/list/
F: drivers/media/dvb-frontends/sp2*
SPACEMIT DWMAC GLUE LAYER
M: Inochi Amaoto <inochiama@gmail.com>
S: Maintained
F: Documentation/devicetree/bindings/net/spacemit,k3-dwmac.yaml
F: drivers/net/ethernet/stmicro/stmmac/dwmac-spacemit.c
SPACEMIT K1 I2C DRIVER
M: Troy Mitchell <troy.mitchell@linux.spacemit.com>
S: Maintained

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@ -216,6 +216,18 @@ config DWMAC_SOPHGO
for the stmmac device driver. This driver is used for the
ethernet controllers on various Sophgo SoCs.
config DWMAC_SPACEMIT
tristate "Spacemit dwmac support"
depends on OF && (ARCH_SPACEMIT || COMPILE_TEST)
select MFD_SYSCON
default m if ARCH_SPACEMIT
help
Support for ethernet controllers on Spacemit RISC-V SoCs
This selects the Spacemit platform specific glue layer support
for the stmmac device driver. This driver is used for the
Spacemit K3 ethernet controllers.
config DWMAC_STARFIVE
tristate "StarFive dwmac support"
depends on OF && (ARCH_STARFIVE || COMPILE_TEST)

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@ -27,6 +27,7 @@ obj-$(CONFIG_DWMAC_RZN1) += dwmac-rzn1.o
obj-$(CONFIG_DWMAC_S32) += dwmac-s32.o
obj-$(CONFIG_DWMAC_SOCFPGA) += dwmac-altr-socfpga.o
obj-$(CONFIG_DWMAC_SOPHGO) += dwmac-sophgo.o
obj-$(CONFIG_DWMAC_SPACEMIT) += dwmac-spacemit.o
obj-$(CONFIG_DWMAC_STARFIVE) += dwmac-starfive.o
obj-$(CONFIG_DWMAC_STI) += dwmac-sti.o
obj-$(CONFIG_DWMAC_STM32) += dwmac-stm32.o

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@ -0,0 +1,227 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Spacemit DWMAC platform driver
*
* Copyright (C) 2026 Inochi Amaoto <inochiama@gmail.com>
*/
#include <linux/clk.h>
#include <linux/math.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/mfd/syscon.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/property.h>
#include <linux/regmap.h>
#include "stmmac_platform.h"
/* ctrl register bits */
#define CTRL_PHY_INTF_RGMII BIT(3)
#define CTRL_PHY_INTF_MII BIT(4)
#define CTRL_WAKE_IRQ_EN BIT(9)
#define CTRL_PHY_IRQ_EN BIT(12)
/* dline register bits */
#define RGMII_RX_DLINE_EN BIT(0)
#define RGMII_RX_DLINE_STEP GENMASK(5, 4)
#define RGMII_RX_DLINE_CODE GENMASK(15, 8)
#define RGMII_TX_DLINE_EN BIT(16)
#define RGMII_TX_DLINE_STEP GENMASK(21, 20)
#define RGMII_TX_DLINE_CODE GENMASK(31, 24)
#define MAX_DLINE_DELAY_CODE 0xff
#define MAX_WORKED_DELAY 2800
/* Note: the delay step value is at 0.1ps */
#define K3_DELAY_STEP 367
struct spacmit_dwmac {
struct regmap *apmu;
unsigned int ctrl_offset;
unsigned int dline_offset;
};
static int spacemit_dwmac_set_delay(struct spacmit_dwmac *dwmac,
unsigned int tx_code, unsigned int rx_code)
{
unsigned int mask, val;
mask = RGMII_TX_DLINE_STEP | RGMII_TX_DLINE_CODE | RGMII_TX_DLINE_EN |
RGMII_RX_DLINE_STEP | RGMII_RX_DLINE_CODE | RGMII_RX_DLINE_EN;
/*
* Since the delay step provided by config 0 is small enough, and
* it can cover the range of the valid delay, so there is no needed
* to use other step config.
*/
val = FIELD_PREP(RGMII_TX_DLINE_STEP, 0) |
FIELD_PREP(RGMII_TX_DLINE_CODE, tx_code) | RGMII_TX_DLINE_EN |
FIELD_PREP(RGMII_RX_DLINE_STEP, 0) |
FIELD_PREP(RGMII_RX_DLINE_CODE, rx_code) | RGMII_RX_DLINE_EN;
return regmap_update_bits(dwmac->apmu, dwmac->dline_offset,
mask, val);
}
static int spacemit_dwmac_detected_delay_value(unsigned int delay)
{
if (delay == 0)
return 0;
if (delay > MAX_WORKED_DELAY)
return -EINVAL;
/*
* Note K3 require a specific factor for calculate
* the delay, in this scenario it is 0.9. So the
* formula is code * step / 10 * 0.9
*/
return DIV_ROUND_CLOSEST(delay * 10 * 10, K3_DELAY_STEP * 9);
}
static int spacemit_dwmac_fix_delay(struct spacmit_dwmac *dwmac,
unsigned int tx_delay,
unsigned int rx_delay)
{
int rx_code;
int tx_code;
rx_code = spacemit_dwmac_detected_delay_value(rx_delay);
if (rx_code < 0)
return rx_code;
tx_code = spacemit_dwmac_detected_delay_value(tx_delay);
if (tx_code < 0)
return tx_code;
return spacemit_dwmac_set_delay(dwmac, tx_code, rx_code);
}
static int spacemit_dwmac_update_irq_config(struct spacmit_dwmac *dwmac,
struct stmmac_resources *stmmac_res)
{
unsigned int val = stmmac_res->wol_irq >= 0 ? CTRL_WAKE_IRQ_EN : 0;
unsigned int mask = CTRL_WAKE_IRQ_EN;
return regmap_update_bits(dwmac->apmu, dwmac->ctrl_offset,
mask, val);
}
static void spacemit_get_interfaces(struct stmmac_priv *priv, void *bsp_priv,
unsigned long *interfaces)
{
__set_bit(PHY_INTERFACE_MODE_MII, interfaces);
__set_bit(PHY_INTERFACE_MODE_RMII, interfaces);
phy_interface_set_rgmii(interfaces);
}
static int spacemit_set_phy_intf_sel(void *bsp_priv, u8 phy_intf_sel)
{
unsigned int mask = CTRL_PHY_INTF_MII | CTRL_PHY_INTF_RGMII;
struct spacmit_dwmac *dwmac = bsp_priv;
unsigned int val = 0;
switch (phy_intf_sel) {
case PHY_INTF_SEL_GMII_MII:
val = CTRL_PHY_INTF_MII;
break;
case PHY_INTF_SEL_RMII:
break;
case PHY_INTF_SEL_RGMII:
val = CTRL_PHY_INTF_RGMII;
break;
default:
return -EINVAL;
}
return regmap_update_bits(dwmac->apmu, dwmac->ctrl_offset,
mask, val);
}
static int spacemit_dwmac_probe(struct platform_device *pdev)
{
struct plat_stmmacenet_data *plat_dat;
struct stmmac_resources stmmac_res;
struct device *dev = &pdev->dev;
struct spacmit_dwmac *dwmac;
unsigned int offset[2];
struct regmap *apmu;
struct clk *clk_tx;
u32 rx_delay = 0;
u32 tx_delay = 0;
int ret;
ret = stmmac_get_platform_resources(pdev, &stmmac_res);
if (ret)
return dev_err_probe(dev, ret,
"failed to get platform resources\n");
dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);
if (!dwmac)
return -ENOMEM;
plat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac);
if (IS_ERR(plat_dat))
return dev_err_probe(dev, PTR_ERR(plat_dat),
"failed to parse DT parameters\n");
clk_tx = devm_clk_get_enabled(&pdev->dev, "tx");
if (IS_ERR(clk_tx))
return dev_err_probe(&pdev->dev, PTR_ERR(clk_tx),
"failed to get tx clock\n");
apmu = syscon_regmap_lookup_by_phandle_args(pdev->dev.of_node,
"spacemit,apmu", 2,
offset);
if (IS_ERR(apmu))
return dev_err_probe(dev, PTR_ERR(apmu),
"Failed to get apmu regmap\n");
dwmac->apmu = apmu;
dwmac->ctrl_offset = offset[0];
dwmac->dline_offset = offset[1];
ret = spacemit_dwmac_update_irq_config(dwmac, &stmmac_res);
if (ret)
return dev_err_probe(dev, ret, "Failed to configure irq config\n");
of_property_read_u32(pdev->dev.of_node, "tx-internal-delay-ps",
&tx_delay);
of_property_read_u32(pdev->dev.of_node, "rx-internal-delay-ps",
&rx_delay);
plat_dat->get_interfaces = spacemit_get_interfaces;
plat_dat->set_phy_intf_sel = spacemit_set_phy_intf_sel;
plat_dat->bsp_priv = dwmac;
ret = spacemit_dwmac_fix_delay(dwmac, tx_delay, rx_delay);
if (ret)
return dev_err_probe(dev, ret, "Failed to configure delay\n");
return stmmac_dvr_probe(dev, plat_dat, &stmmac_res);
}
static const struct of_device_id spacemit_dwmac_match[] = {
{ .compatible = "spacemit,k3-dwmac" },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, spacemit_dwmac_match);
static struct platform_driver spacemit_dwmac_driver = {
.probe = spacemit_dwmac_probe,
.remove = stmmac_pltfr_remove,
.driver = {
.name = "spacemit-dwmac",
.pm = &stmmac_pltfr_pm_ops,
.of_match_table = spacemit_dwmac_match,
},
};
module_platform_driver(spacemit_dwmac_driver);
MODULE_AUTHOR("Inochi Amaoto <inochiama@gmail.com>");
MODULE_DESCRIPTION("Spacemit DWMAC platform driver");
MODULE_LICENSE("GPL");

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@ -403,6 +403,7 @@ static const char * const stmmac_gmac4_compats[] = {
"snps,dwmac-5.10a",
"snps,dwmac-5.20",
"snps,dwmac-5.30a",
"snps,dwmac-5.40a",
NULL
};