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arm64: dts: qcom: sa8775p: add missing spi nodes
Add the missing nodes of the SPI buses present on sa8775p platform. Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230526133122.16443-4-quic_shazhuss@quicinc.com
This commit is contained in:
Shazad Hussain
Bjorn Andersson
parent
ee2f5f906d
commit
1b2d7ad5ac
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@ -511,6 +511,27 @@ &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>,
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status = "disabled";
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status = "disabled";
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};
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};
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spi14: spi@880000 {
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compatible = "qcom,geni-spi";
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reg = <0x0 0x880000 0x0 0x4000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>;
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clock-names = "se";
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interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
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&clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS>,
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<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
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&config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>,
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<&aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS
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&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
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interconnect-names = "qup-core",
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"qup-config",
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"qup-memory";
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power-domains = <&rpmhpd SA8775P_CX>;
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status = "disabled";
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};
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i2c15: i2c@884000 {
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i2c15: i2c@884000 {
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compatible = "qcom,geni-i2c";
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compatible = "qcom,geni-i2c";
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reg = <0x0 0x884000 0x0 0x4000>;
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reg = <0x0 0x884000 0x0 0x4000>;
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@ -532,6 +553,27 @@ &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>,
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status = "disabled";
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status = "disabled";
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};
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};
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spi15: spi@884000 {
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compatible = "qcom,geni-spi";
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reg = <0x0 0x884000 0x0 0x4000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>;
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clock-names = "se";
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interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
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&clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS>,
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<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
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&config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>,
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<&aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS
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&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
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interconnect-names = "qup-core",
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"qup-config",
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"qup-memory";
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power-domains = <&rpmhpd SA8775P_CX>;
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status = "disabled";
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};
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i2c16: i2c@888000 {
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i2c16: i2c@888000 {
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compatible = "qcom,geni-i2c";
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compatible = "qcom,geni-i2c";
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reg = <0x0 0x888000 0x0 0x4000>;
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reg = <0x0 0x888000 0x0 0x4000>;
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@ -595,6 +637,27 @@ &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>,
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status = "disabled";
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status = "disabled";
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};
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};
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spi17: spi@88c000 {
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compatible = "qcom,geni-spi";
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reg = <0x0 0x88c000 0x0 0x4000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>;
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clock-names = "se";
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interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
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&clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS>,
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<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
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&config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>,
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<&aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS
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&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
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interconnect-names = "qup-core",
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"qup-config",
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"qup-memory";
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power-domains = <&rpmhpd SA8775P_CX>;
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status = "disabled";
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};
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uart17: serial@88c000 {
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uart17: serial@88c000 {
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compatible = "qcom,geni-uart";
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compatible = "qcom,geni-uart";
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reg = <0x0 0x0088c000 0x0 0x4000>;
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reg = <0x0 0x0088c000 0x0 0x4000>;
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@ -631,6 +694,27 @@ &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>,
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status = "disabled";
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status = "disabled";
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};
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};
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spi18: spi@890000 {
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compatible = "qcom,geni-spi";
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reg = <0x0 0x890000 0x0 0x4000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>;
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clock-names = "se";
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interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
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&clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS>,
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<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
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&config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>,
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<&aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS
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&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
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interconnect-names = "qup-core",
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"qup-config",
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"qup-memory";
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power-domains = <&rpmhpd SA8775P_CX>;
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status = "disabled";
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};
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i2c19: i2c@894000 {
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i2c19: i2c@894000 {
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compatible = "qcom,geni-i2c";
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compatible = "qcom,geni-i2c";
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reg = <0x0 0x894000 0x0 0x4000>;
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reg = <0x0 0x894000 0x0 0x4000>;
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@ -652,6 +736,27 @@ &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>,
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status = "disabled";
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status = "disabled";
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};
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};
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spi19: spi@894000 {
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compatible = "qcom,geni-spi";
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reg = <0x0 0x894000 0x0 0x4000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>;
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clock-names = "se";
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interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
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&clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS>,
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<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
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&config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>,
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<&aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS
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&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
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interconnect-names = "qup-core",
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"qup-config",
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"qup-memory";
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power-domains = <&rpmhpd SA8775P_CX>;
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status = "disabled";
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};
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i2c20: i2c@898000 {
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i2c20: i2c@898000 {
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compatible = "qcom,geni-i2c";
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compatible = "qcom,geni-i2c";
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reg = <0x0 0x898000 0x0 0x4000>;
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reg = <0x0 0x898000 0x0 0x4000>;
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@ -672,6 +777,27 @@ &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>,
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power-domains = <&rpmhpd SA8775P_CX>;
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power-domains = <&rpmhpd SA8775P_CX>;
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status = "disabled";
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status = "disabled";
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};
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};
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spi20: spi@898000 {
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compatible = "qcom,geni-spi";
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reg = <0x0 0x898000 0x0 0x4000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <GIC_SPI 834 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&gcc GCC_QUPV3_WRAP2_S6_CLK>;
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clock-names = "se";
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interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
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&clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS>,
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<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
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&config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>,
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<&aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS
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&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
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interconnect-names = "qup-core",
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"qup-config",
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"qup-memory";
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power-domains = <&rpmhpd SA8775P_CX>;
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status = "disabled";
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};
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};
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};
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qupv3_id_0: geniqup@9c0000 {
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qupv3_id_0: geniqup@9c0000 {
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@ -707,6 +833,27 @@ &config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS>,
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status = "disabled";
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status = "disabled";
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};
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};
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spi0: spi@980000 {
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compatible = "qcom,geni-spi";
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reg = <0x0 0x980000 0x0 0x4000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <GIC_SPI 550 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
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clock-names = "se";
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interconnects = <&clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS
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&clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS>,
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<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
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&config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS>,
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<&aggre2_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS
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&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
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interconnect-names = "qup-core",
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"qup-config",
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"qup-memory";
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power-domains = <&rpmhpd SA8775P_CX>;
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status = "disabled";
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};
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i2c1: i2c@984000 {
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i2c1: i2c@984000 {
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compatible = "qcom,geni-i2c";
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compatible = "qcom,geni-i2c";
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reg = <0x0 0x984000 0x0 0x4000>;
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reg = <0x0 0x984000 0x0 0x4000>;
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@ -728,6 +875,27 @@ &config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS>,
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status = "disabled";
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status = "disabled";
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};
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};
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spi1: spi@984000 {
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compatible = "qcom,geni-spi";
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reg = <0x0 0x984000 0x0 0x4000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <GIC_SPI 551 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>;
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clock-names = "se";
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interconnects = <&clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS
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&clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS>,
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<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
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&config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS>,
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<&aggre2_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS
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&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
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interconnect-names = "qup-core",
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"qup-config",
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"qup-memory";
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power-domains = <&rpmhpd SA8775P_CX>;
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status = "disabled";
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};
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i2c2: i2c@988000 {
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i2c2: i2c@988000 {
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compatible = "qcom,geni-i2c";
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compatible = "qcom,geni-i2c";
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reg = <0x0 0x988000 0x0 0x4000>;
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reg = <0x0 0x988000 0x0 0x4000>;
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@ -749,6 +917,27 @@ &config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS>,
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status = "disabled";
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status = "disabled";
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};
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};
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spi2: spi@988000 {
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compatible = "qcom,geni-spi";
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reg = <0x0 0x988000 0x0 0x4000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <GIC_SPI 529 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
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clock-names = "se";
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interconnects = <&clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS
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&clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS>,
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<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
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&config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS>,
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<&aggre2_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS
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&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
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interconnect-names = "qup-core",
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"qup-config",
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"qup-memory";
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power-domains = <&rpmhpd SA8775P_CX>;
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status = "disabled";
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};
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i2c3: i2c@98c000 {
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i2c3: i2c@98c000 {
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compatible = "qcom,geni-i2c";
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compatible = "qcom,geni-i2c";
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reg = <0x0 0x98c000 0x0 0x4000>;
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reg = <0x0 0x98c000 0x0 0x4000>;
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@ -770,6 +959,27 @@ &config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS>,
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status = "disabled";
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status = "disabled";
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};
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};
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spi3: spi@98c000 {
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compatible = "qcom,geni-spi";
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reg = <0x0 0x98c000 0x0 0x4000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <GIC_SPI 530 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>;
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clock-names = "se";
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interconnects = <&clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS
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&clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS>,
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<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
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||||||
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&config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS>,
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<&aggre2_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS
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&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
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interconnect-names = "qup-core",
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"qup-config",
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"qup-memory";
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power-domains = <&rpmhpd SA8775P_CX>;
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status = "disabled";
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};
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i2c4: i2c@990000 {
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i2c4: i2c@990000 {
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compatible = "qcom,geni-i2c";
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compatible = "qcom,geni-i2c";
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reg = <0x0 0x990000 0x0 0x4000>;
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reg = <0x0 0x990000 0x0 0x4000>;
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@ -791,6 +1001,27 @@ &config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS>,
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status = "disabled";
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status = "disabled";
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};
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};
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||||||
|
spi4: spi@990000 {
|
||||||
|
compatible = "qcom,geni-spi";
|
||||||
|
reg = <0x0 0x990000 0x0 0x4000>;
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
interrupts = <GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>;
|
||||||
|
clock-names = "se";
|
||||||
|
interconnects = <&clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS
|
||||||
|
&clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS>,
|
||||||
|
<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
|
||||||
|
&config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS>,
|
||||||
|
<&aggre2_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS
|
||||||
|
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
|
||||||
|
interconnect-names = "qup-core",
|
||||||
|
"qup-config",
|
||||||
|
"qup-memory";
|
||||||
|
power-domains = <&rpmhpd SA8775P_CX>;
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
i2c5: i2c@994000 {
|
i2c5: i2c@994000 {
|
||||||
compatible = "qcom,geni-i2c";
|
compatible = "qcom,geni-i2c";
|
||||||
reg = <0x0 0x994000 0x0 0x4000>;
|
reg = <0x0 0x994000 0x0 0x4000>;
|
||||||
|
|
@ -811,6 +1042,27 @@ &config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS>,
|
||||||
power-domains = <&rpmhpd SA8775P_CX>;
|
power-domains = <&rpmhpd SA8775P_CX>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
spi5: spi@994000 {
|
||||||
|
compatible = "qcom,geni-spi";
|
||||||
|
reg = <0x0 0x994000 0x0 0x4000>;
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
interrupts = <GIC_SPI 535 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
|
||||||
|
clock-names = "se";
|
||||||
|
interconnects = <&clk_virt MASTER_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS
|
||||||
|
&clk_virt SLAVE_QUP_CORE_0 QCOM_ICC_TAG_ALWAYS>,
|
||||||
|
<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
|
||||||
|
&config_noc SLAVE_QUP_0 QCOM_ICC_TAG_ALWAYS>,
|
||||||
|
<&aggre2_noc MASTER_QUP_0 QCOM_ICC_TAG_ALWAYS
|
||||||
|
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
|
||||||
|
interconnect-names = "qup-core",
|
||||||
|
"qup-config",
|
||||||
|
"qup-memory";
|
||||||
|
power-domains = <&rpmhpd SA8775P_CX>;
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
qupv3_id_1: geniqup@ac0000 {
|
qupv3_id_1: geniqup@ac0000 {
|
||||||
|
|
@ -846,6 +1098,27 @@ &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS>,
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
spi7: spi@a80000 {
|
||||||
|
compatible = "qcom,geni-spi";
|
||||||
|
reg = <0x0 0xa80000 0x0 0x4000>;
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>;
|
||||||
|
clock-names = "se";
|
||||||
|
interconnects = <&clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS
|
||||||
|
&clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS>,
|
||||||
|
<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
|
||||||
|
&config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS>,
|
||||||
|
<&aggre2_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS
|
||||||
|
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
|
||||||
|
interconnect-names = "qup-core",
|
||||||
|
"qup-config",
|
||||||
|
"qup-memory";
|
||||||
|
power-domains = <&rpmhpd SA8775P_CX>;
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
i2c8: i2c@a84000 {
|
i2c8: i2c@a84000 {
|
||||||
compatible = "qcom,geni-i2c";
|
compatible = "qcom,geni-i2c";
|
||||||
reg = <0x0 0xa84000 0x0 0x4000>;
|
reg = <0x0 0xa84000 0x0 0x4000>;
|
||||||
|
|
@ -867,6 +1140,27 @@ &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS>,
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
spi8: spi@a84000 {
|
||||||
|
compatible = "qcom,geni-spi";
|
||||||
|
reg = <0x0 0xa84000 0x0 0x4000>;
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>;
|
||||||
|
clock-names = "se";
|
||||||
|
interconnects = <&clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS
|
||||||
|
&clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS>,
|
||||||
|
<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
|
||||||
|
&config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS>,
|
||||||
|
<&aggre2_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS
|
||||||
|
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
|
||||||
|
interconnect-names = "qup-core",
|
||||||
|
"qup-config",
|
||||||
|
"qup-memory";
|
||||||
|
power-domains = <&rpmhpd SA8775P_CX>;
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
i2c9: i2c@a88000 {
|
i2c9: i2c@a88000 {
|
||||||
compatible = "qcom,geni-i2c";
|
compatible = "qcom,geni-i2c";
|
||||||
reg = <0x0 0xa88000 0x0 0x4000>;
|
reg = <0x0 0xa88000 0x0 0x4000>;
|
||||||
|
|
@ -888,6 +1182,27 @@ &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS>,
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
spi9: spi@a88000 {
|
||||||
|
compatible = "qcom,geni-spi";
|
||||||
|
reg = <0x0 0xa88000 0x0 0x4000>;
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>;
|
||||||
|
clock-names = "se";
|
||||||
|
interconnects = <&clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS
|
||||||
|
&clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS>,
|
||||||
|
<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
|
||||||
|
&config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS>,
|
||||||
|
<&aggre2_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS
|
||||||
|
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
|
||||||
|
interconnect-names = "qup-core",
|
||||||
|
"qup-config",
|
||||||
|
"qup-memory";
|
||||||
|
power-domains = <&rpmhpd SA8775P_CX>;
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
i2c10: i2c@a8c000 {
|
i2c10: i2c@a8c000 {
|
||||||
compatible = "qcom,geni-i2c";
|
compatible = "qcom,geni-i2c";
|
||||||
reg = <0x0 0xa8c000 0x0 0x4000>;
|
reg = <0x0 0xa8c000 0x0 0x4000>;
|
||||||
|
|
@ -909,6 +1224,27 @@ &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS>,
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
spi10: spi@a8c000 {
|
||||||
|
compatible = "qcom,geni-spi";
|
||||||
|
reg = <0x0 0xa8c000 0x0 0x4000>;
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>;
|
||||||
|
clock-names = "se";
|
||||||
|
interconnects = <&clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS
|
||||||
|
&clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS>,
|
||||||
|
<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
|
||||||
|
&config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS>,
|
||||||
|
<&aggre2_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS
|
||||||
|
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
|
||||||
|
interconnect-names = "qup-core",
|
||||||
|
"qup-config",
|
||||||
|
"qup-memory";
|
||||||
|
power-domains = <&rpmhpd SA8775P_CX>;
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
uart10: serial@a8c000 {
|
uart10: serial@a8c000 {
|
||||||
compatible = "qcom,geni-uart";
|
compatible = "qcom,geni-uart";
|
||||||
reg = <0x0 0x00a8c000 0x0 0x4000>;
|
reg = <0x0 0x00a8c000 0x0 0x4000>;
|
||||||
|
|
@ -946,6 +1282,27 @@ &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS>,
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
spi11: spi@a90000 {
|
||||||
|
compatible = "qcom,geni-spi";
|
||||||
|
reg = <0x0 0xa90000 0x0 0x4000>;
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>;
|
||||||
|
clock-names = "se";
|
||||||
|
interconnects = <&clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS
|
||||||
|
&clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS>,
|
||||||
|
<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
|
||||||
|
&config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS>,
|
||||||
|
<&aggre2_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS
|
||||||
|
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
|
||||||
|
interconnect-names = "qup-core",
|
||||||
|
"qup-config",
|
||||||
|
"qup-memory";
|
||||||
|
power-domains = <&rpmhpd SA8775P_CX>;
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
i2c12: i2c@a94000 {
|
i2c12: i2c@a94000 {
|
||||||
compatible = "qcom,geni-i2c";
|
compatible = "qcom,geni-i2c";
|
||||||
reg = <0x0 0xa94000 0x0 0x4000>;
|
reg = <0x0 0xa94000 0x0 0x4000>;
|
||||||
|
|
@ -967,6 +1324,27 @@ &config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS>,
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
spi12: spi@a94000 {
|
||||||
|
compatible = "qcom,geni-spi";
|
||||||
|
reg = <0x0 0xa94000 0x0 0x4000>;
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>;
|
||||||
|
clock-names = "se";
|
||||||
|
interconnects = <&clk_virt MASTER_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS
|
||||||
|
&clk_virt SLAVE_QUP_CORE_1 QCOM_ICC_TAG_ALWAYS>,
|
||||||
|
<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
|
||||||
|
&config_noc SLAVE_QUP_1 QCOM_ICC_TAG_ALWAYS>,
|
||||||
|
<&aggre2_noc MASTER_QUP_1 QCOM_ICC_TAG_ALWAYS
|
||||||
|
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
|
||||||
|
interconnect-names = "qup-core",
|
||||||
|
"qup-config",
|
||||||
|
"qup-memory";
|
||||||
|
power-domains = <&rpmhpd SA8775P_CX>;
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
uart12: serial@a94000 {
|
uart12: serial@a94000 {
|
||||||
compatible = "qcom,geni-uart";
|
compatible = "qcom,geni-uart";
|
||||||
reg = <0x0 0x00a94000 0x0 0x4000>;
|
reg = <0x0 0x00a94000 0x0 0x4000>;
|
||||||
|
|
@ -1036,6 +1414,27 @@ &config_noc SLAVE_QUP_3 QCOM_ICC_TAG_ALWAYS>,
|
||||||
power-domains = <&rpmhpd SA8775P_CX>;
|
power-domains = <&rpmhpd SA8775P_CX>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
spi21: spi@b80000 {
|
||||||
|
compatible = "qcom,geni-spi";
|
||||||
|
reg = <0x0 0xb80000 0x0 0x4000>;
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
interrupts = <GIC_SPI 831 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
clocks = <&gcc GCC_QUPV3_WRAP3_S0_CLK>;
|
||||||
|
clock-names = "se";
|
||||||
|
interconnects = <&clk_virt MASTER_QUP_CORE_3 QCOM_ICC_TAG_ALWAYS
|
||||||
|
&clk_virt SLAVE_QUP_CORE_3 QCOM_ICC_TAG_ALWAYS>,
|
||||||
|
<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
|
||||||
|
&config_noc SLAVE_QUP_3 QCOM_ICC_TAG_ALWAYS>,
|
||||||
|
<&aggre1_noc MASTER_QUP_3 QCOM_ICC_TAG_ALWAYS
|
||||||
|
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
|
||||||
|
interconnect-names = "qup-core",
|
||||||
|
"qup-config",
|
||||||
|
"qup-memory";
|
||||||
|
power-domains = <&rpmhpd SA8775P_CX>;
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
ufs_mem_hc: ufs@1d84000 {
|
ufs_mem_hc: ufs@1d84000 {
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue
Block a user