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drm/i915/display: Separate xe and i915 common dpt code into own file

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Here created intel_dpt_common.c to hold intel_dpt_configure which is
needed for both xe and i915.

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231116150225.204233-1-juhapekka.heikkila@gmail.com
This commit is contained in:
Juha-Pekka Heikkila 2023-11-16 17:02:23 +02:00 committed by Jouni Högander
parent 07e823c0fd
commit 1aba67132c
6 changed files with 49 additions and 28 deletions
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1
drivers/gpu/drm/i915/Makefile
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@ -275,6 +275,7 @@ i915-y += \
display/intel_dpll.o \
display/intel_dpll_mgr.o \
display/intel_dpt.o \
display/intel_dpt_common.o \
display/intel_drrs.o \
display/intel_dsb.o \
display/intel_dsb_buffer.o \

1
drivers/gpu/drm/i915/display/intel_display.c
View File

@ -76,6 +76,7 @@
#include "intel_dpll.h"
#include "intel_dpll_mgr.h"
#include "intel_dpt.h"
#include "intel_dpt_common.h"
#include "intel_drrs.h"
#include "intel_dsb.h"
#include "intel_dsi.h"

26
drivers/gpu/drm/i915/display/intel_dpt.c
View File

@ -9,8 +9,6 @@
#include "gt/gen8_ppgtt.h"
#include "i915_drv.h"
#include "i915_reg.h"
#include "intel_de.h"
#include "intel_display_types.h"
#include "intel_dpt.h"
#include "intel_fb.h"
@ -318,27 +316,3 @@ void intel_dpt_destroy(struct i915_address_space *vm)
i915_vm_put(&dpt->vm);
}
void intel_dpt_configure(struct intel_crtc *crtc)
{
struct drm_i915_private *i915 = to_i915(crtc->base.dev);
if (DISPLAY_VER(i915) == 14) {
enum pipe pipe = crtc->pipe;
enum plane_id plane_id;
for_each_plane_id_on_crtc(crtc, plane_id) {
if (plane_id == PLANE_CURSOR)
continue;
intel_de_rmw(i915, PLANE_CHICKEN(pipe, plane_id),
PLANE_CHICKEN_DISABLE_DPT,
i915->display.params.enable_dpt ? 0 :
PLANE_CHICKEN_DISABLE_DPT);
}
} else if (DISPLAY_VER(i915) == 13) {
intel_de_rmw(i915, CHICKEN_MISC_2,
CHICKEN_MISC_DISABLE_DPT,
i915->display.params.enable_dpt ? 0 :
CHICKEN_MISC_DISABLE_DPT);
}
}

2
drivers/gpu/drm/i915/display/intel_dpt.h
View File

@ -10,7 +10,6 @@ struct drm_i915_private;
struct i915_address_space;
struct i915_vma;
struct intel_crtc;
struct intel_framebuffer;
void intel_dpt_destroy(struct i915_address_space *vm);
@ -20,6 +19,5 @@ void intel_dpt_suspend(struct drm_i915_private *i915);
void intel_dpt_resume(struct drm_i915_private *i915);
struct i915_address_space *
intel_dpt_create(struct intel_framebuffer *fb);
void intel_dpt_configure(struct intel_crtc *crtc);
#endif /* __INTEL_DPT_H__ */

34
drivers/gpu/drm/i915/display/intel_dpt_common.c Normal file
View File

@ -0,0 +1,34 @@
// SPDX-License-Identifier: MIT
/*
* Copyright © 2023 Intel Corporation
*/
#include "i915_reg.h"
#include "intel_de.h"
#include "intel_display_types.h"
#include "intel_dpt_common.h"
void intel_dpt_configure(struct intel_crtc *crtc)
{
struct drm_i915_private *i915 = to_i915(crtc->base.dev);
if (DISPLAY_VER(i915) == 14) {
enum pipe pipe = crtc->pipe;
enum plane_id plane_id;
for_each_plane_id_on_crtc(crtc, plane_id) {
if (plane_id == PLANE_CURSOR)
continue;
intel_de_rmw(i915, PLANE_CHICKEN(pipe, plane_id),
PLANE_CHICKEN_DISABLE_DPT,
i915->display.params.enable_dpt ? 0 :
PLANE_CHICKEN_DISABLE_DPT);
}
} else if (DISPLAY_VER(i915) == 13) {
intel_de_rmw(i915, CHICKEN_MISC_2,
CHICKEN_MISC_DISABLE_DPT,
i915->display.params.enable_dpt ? 0 :
CHICKEN_MISC_DISABLE_DPT);
}
}

13
drivers/gpu/drm/i915/display/intel_dpt_common.h Normal file
View File

@ -0,0 +1,13 @@
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2023 Intel Corporation
*/
#ifndef __INTEL_DPT_COMMON_H__
#define __INTEL_DPT_COMMON_H__
struct intel_crtc;
void intel_dpt_configure(struct intel_crtc *crtc);
#endif /* __INTEL_DPT_COMMON_H__ */