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arm64: dts: qcom: sm8250: fix USB-DP PHY registers
commitf8d8840c72upstream. When adding support for the DisplayPort part of the QMP PHY the binding (and devicetree parser) for the (USB) child node was simply reused and this has lead to some confusion. The third DP register region is really the DP_PHY region, not "PCS" as the binding claims, and lie at offset 0x2a00 (not 0x2c00). Similarly, there likely are no "RX", "RX2" or "PCS_MISC" regions as there are for the USB part of the PHY (and in any case the Linux driver does not use them). Note that the sixth "PCS_MISC" region is not even in the binding. Fixes:5aa0d1becd("arm64: dts: qcom: sm8250: switch usb1 qmp phy to USB3+DP mode") Cc: stable@vger.kernel.org # 5.13 Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221111094729.11842-3-johan+linaro@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -2892,10 +2892,9 @@ usb_1_ssphy: usb3-phy@88e9200 {
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dp_phy: dp-phy@88ea200 {
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reg = <0 0x088ea200 0 0x200>,
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<0 0x088ea400 0 0x200>,
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<0 0x088eac00 0 0x400>,
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<0 0x088eaa00 0 0x200>,
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<0 0x088ea600 0 0x200>,
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<0 0x088ea800 0 0x200>,
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<0 0x088eaa00 0 0x100>;
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<0 0x088ea800 0 0x200>;
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#phy-cells = <0>;
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#clock-cells = <1>;
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};
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