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Airoha EN7523:
- Add clock and PCIe support Several style fixes to comply with DT spec. -----BEGIN PGP SIGNATURE----- iQJLBAABCAA1FiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAmLIYbgXHG1hdHRoaWFz LmJnZ0BnbWFpbC5jb20ACgkQL21+TfbCqH43hw/+LIYjsqltL7o7wRYgyreHXUoy 2Z5ZIhcqiAoHJxaaXhBAcUhZH2V5rP5ZOI4CrGasF4yc4S5PZzlafG5QkbRSrJ0C BV5guGaielfEtlucRS3rTvbkw9k7OrfSaxdMkzp82ePy+/lCcU7g209QOm+3xEZI ICSAFpEo6ApaBLxglukwBttg/C/cjazG2siL3twdsjr6ls4h50FAW628U7mJ2TNK gPNdVyB+Dir5rnALv2HzZAY3n+UV5TMJTcZAJqpn5gOKBykcQRu6E80S/47KXxX+ 2Ff09SPcserBbpHQZwvnZwGWTcZYEo2Oxre690tEjpTexab535jetmlPLwXCV4TV X+ZfOCAC7cy8MrrNTBsp8eqp2mN6mF7dO0440CE4qoMEs+0Feuov1ySCObCh2iZu V3ujag0HeO6pfwrvxvmvjqG6KbU4S0YjYofy+lPaWyjWFgYiJw0BW9INEEuPKaXm M21gxCLWnKznexIuU8kwHcHl4x/vU8qyTQ5mx710fHbkAWegKBeluKOxuq2ayvdV 1I6exMEikRriQLNlwnvRc79efsO/UxDZdkdS3XEViDTKSe0Vr+uP2O+SD90vgpG8 DWo54BthM2kOnRgZ5zEsIxkEoCzw+TscOxVcmII4xypM+tmlDIYajKghTCA+focT hS8R6HLLKdXb4K3QC+I= =K+JE -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLMEUcACgkQmmx57+YA GNmcaxAAiYc/pea0Cf04ptOPuyiCc/mHqMpJhnkXwLiL3jEA9SUxnAaNpFDqq0Hj X6Pw4zJbAqWQv77x+C+vXSWZEAxeL1oZwSHxIZmpiPsnB4HRS+EOyQEll8PIUUXN 3PH0HX/17r4IGqZlORCLDg6vqZdLQ1n6jRYT1CiYIkwRgXBcTEUlV3KD7hZqTu86 PsrEM7puItwHmsM21ZquqcZwSyWqNQAXwP4FYcCOwaoyZB3C0NZPdqG0jf0p49tl OW/A7zt2jmqSC3Iq6SgPdbjlF785ygZdwo5Lu8adv7FWDtXbMJ//LodODxqYchYs DQI8CAPNIXwhTRF/OxZ14BHXUEkEufG/2+Y1JBWWuRPRrIK9BrLkTQ0f/fVBX29V BDW5A2P6sYAvy67sQqutxbDfc2z1m7cIOdaTdxfX4WJSnusFEsFn22hoyBgcWwwz ZWrBUezawFaKrcj5OcWjFX8897eGkkfcRLchz+Z6lf5/POySBn4Shiafu9hUCeu/ Q7tfAPadgltMobgSlD33Vby2BQh+tIKOMPKxY/2o3zOXPyd9V1/7iJYW/3QNV+gM O5kuzkBfp1nNMMVvJDy6WZY3EEiBAIiQjQH2rOljsgr4XR1tFj4fvWz4cAQ7ovA3 HrUJWx4SqdcwZTRwWAUGAdRGQrUvs/kzYN0xmvADJ45EF/67aU4= =hSRu -----END PGP SIGNATURE----- Merge tag 'v5.19-next-dts32' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt Airoha EN7523: - Add clock and PCIe support Several style fixes to comply with DT spec. * tag 'v5.19-next-dts32' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: ARM: dts: mediatek: align gpio-key node names with dtschema ARM: dts: mediatek: adjust whitespace around '=' ARM: dts: Add PCIe support for Airoha EN7523 ARM: dts: add clock support for Airoha EN7523 Link: https://lore.kernel.org/r/63536da6-fbe4-2d96-ab91-ae756cd580c4@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
commit
1a110d77a9
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@ -33,3 +33,11 @@ &gpio0 {
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&gpio1 {
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status = "okay";
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};
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&pcie0 {
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status = "okay";
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};
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&pcie1 {
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status = "okay";
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};
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@ -3,6 +3,7 @@
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/clock/en7523-clk.h>
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/ {
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interrupt-parent = <&gic>;
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@ -83,6 +84,13 @@ L2_0: l2-cache0 {
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};
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};
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scu: system-controller@1fa20000 {
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compatible = "airoha,en7523-scu";
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reg = <0x1fa20000 0x400>,
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<0x1fb00000 0x1000>;
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#clock-cells = <1>;
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};
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gic: interrupt-controller@9000000 {
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compatible = "arm,gic-v3";
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interrupt-controller;
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@ -135,4 +143,62 @@ gpio1: gpio@1fbf0270 {
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gpio-controller;
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#gpio-cells = <2>;
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};
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pcie0: pcie@1fa91000 {
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compatible = "airoha,en7523-pcie", "mediatek,mt7622-pcie";
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device_type = "pci";
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reg = <0x1fa91000 0x1000>;
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reg-names = "port0";
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linux,pci-domain = <0>;
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#address-cells = <3>;
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#size-cells = <2>;
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interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "pcie_irq";
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clocks = <&scu EN7523_CLK_PCIE>;
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clock-names = "sys_ck0";
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bus-range = <0x00 0xff>;
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ranges = <0x82000000 0 0x20000000 0x20000000 0 0x8000000>;
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status = "disabled";
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 7>;
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interrupt-map = <0 0 0 1 &pcie_intc0 0>,
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<0 0 0 2 &pcie_intc0 1>,
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<0 0 0 3 &pcie_intc0 2>,
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<0 0 0 4 &pcie_intc0 3>;
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pcie_intc0: interrupt-controller {
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <1>;
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};
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};
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pcie1: pcie@1fa92000 {
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compatible = "airoha,en7523-pcie", "mediatek,mt7622-pcie";
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device_type = "pci";
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reg = <0x1fa92000 0x1000>;
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reg-names = "port1";
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linux,pci-domain = <1>;
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#address-cells = <3>;
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#size-cells = <2>;
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interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "pcie_irq";
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clocks = <&scu EN7523_CLK_PCIE>;
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clock-names = "sys_ck1";
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bus-range = <0x00 0xff>;
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ranges = <0x82000000 0 0x28000000 0x28000000 0 0x8000000>;
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status = "disabled";
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 7>;
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interrupt-map = <0 0 0 1 &pcie_intc1 0>,
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<0 0 0 2 &pcie_intc1 1>,
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<0 0 0 3 &pcie_intc1 2>,
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<0 0 0 4 &pcie_intc1 3>;
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pcie_intc1: interrupt-controller {
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <1>;
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};
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};
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};
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@ -427,9 +427,9 @@ audsys: clock-controller@11220000 {
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afe: audio-controller {
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compatible = "mediatek,mt2701-audio";
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interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>,
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interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>,
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<GIC_SPI 132 IRQ_TYPE_LEVEL_LOW>;
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interrupt-names = "afe", "asys";
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interrupt-names = "afe", "asys";
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power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>;
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clocks = <&infracfg CLK_INFRA_AUDIO>,
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@ -559,7 +559,7 @@ jpegdec: jpegdec@15004000 {
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compatible = "mediatek,mt2701-jpgdec";
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reg = <0 0x15004000 0 0x1000>;
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interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&imgsys CLK_IMG_JPGDEC_SMI>,
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clocks = <&imgsys CLK_IMG_JPGDEC_SMI>,
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<&imgsys CLK_IMG_JPGDEC>;
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clock-names = "jpgdec-smi",
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"jpgdec";
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@ -573,7 +573,7 @@ jpegenc: jpegenc@1500a000 {
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"mediatek,mtk-jpgenc";
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reg = <0 0x1500a000 0 0x1000>;
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interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&imgsys CLK_IMG_VENC>;
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clocks = <&imgsys CLK_IMG_VENC>;
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clock-names = "jpgenc";
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power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
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iommus = <&iommu MT2701_M4U_PORT_JPGENC_RDMA>,
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@ -241,7 +241,7 @@ infracfg: syscon@10001000 {
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};
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pericfg: syscon@10003000 {
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compatible = "mediatek,mt7623-pericfg",
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compatible = "mediatek,mt7623-pericfg",
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"mediatek,mt2701-pericfg",
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"syscon";
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reg = <0 0x10003000 0 0x1000>;
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@ -628,9 +628,9 @@ audsys: clock-controller@11220000 {
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afe: audio-controller {
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compatible = "mediatek,mt7623-audio",
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"mediatek,mt2701-audio";
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interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>,
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interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>,
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<GIC_SPI 132 IRQ_TYPE_LEVEL_LOW>;
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interrupt-names = "afe", "asys";
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interrupt-names = "afe", "asys";
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power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>;
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clocks = <&infracfg CLK_INFRA_AUDIO>,
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@ -45,13 +45,13 @@ gpio-keys {
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pinctrl-names = "default";
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pinctrl-0 = <&key_pins_a>;
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factory {
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button-factory {
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label = "factory";
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linux,code = <BTN_0>;
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gpios = <&pio 256 GPIO_ACTIVE_LOW>;
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};
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wps {
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button-wps {
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label = "wps";
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linux,code = <KEY_WPS_BUTTON>;
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gpios = <&pio 257 GPIO_ACTIVE_HIGH>;
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@ -45,13 +45,13 @@ gpio-keys {
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pinctrl-names = "default";
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pinctrl-0 = <&key_pins_a>;
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factory {
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button-factory {
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label = "factory";
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linux,code = <BTN_0>;
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gpios = <&pio 256 GPIO_ACTIVE_LOW>;
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};
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wps {
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button-wps {
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label = "wps";
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linux,code = <KEY_WPS_BUTTON>;
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gpios = <&pio 257 GPIO_ACTIVE_HIGH>;
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@ -91,13 +91,13 @@ gpio-keys {
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pinctrl-names = "default";
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pinctrl-0 = <&key_pins_a>;
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factory {
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button-factory {
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label = "factory";
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linux,code = <BTN_0>;
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gpios = <&pio 256 GPIO_ACTIVE_LOW>;
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};
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wps {
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button-wps {
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label = "wps";
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linux,code = <KEY_WPS_BUTTON>;
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gpios = <&pio 257 GPIO_ACTIVE_HIGH>;
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@ -60,13 +60,13 @@ gpio-keys {
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pinctrl-names = "default";
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pinctrl-0 = <&key_pins_a>;
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factory {
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button-factory {
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label = "factory";
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linux,code = <BTN_0>;
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gpios = <&pio 256 GPIO_ACTIVE_LOW>;
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};
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wps {
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button-wps {
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label = "wps";
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linux,code = <KEY_WPS_BUTTON>;
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gpios = <&pio 257 GPIO_ACTIVE_HIGH>;
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@ -23,13 +23,13 @@ chosen {
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gpio-keys {
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compatible = "gpio-keys";
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reset {
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button-reset {
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label = "factory";
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linux,code = <KEY_RESTART>;
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gpios = <&pio 60 GPIO_ACTIVE_LOW>;
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};
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wps {
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button-wps {
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label = "wps";
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linux,code = <KEY_WPS_BUTTON>;
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gpios = <&pio 58 GPIO_ACTIVE_LOW>;
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