diff --git a/drivers/pci/controller/dwc/pcie-intel-gw.c b/drivers/pci/controller/dwc/pcie-intel-gw.c
index afd933050c92..2674cd376f49 100644
--- a/drivers/pci/controller/dwc/pcie-intel-gw.c
+++ b/drivers/pci/controller/dwc/pcie-intel-gw.c
@@ -310,8 +310,6 @@ static int intel_pcie_host_setup(struct intel_pcie *pcie)
 		goto clk_err;
 	}
 
-	pci->atu_base = pci->dbi_base + 0xC0000;
-
 	ret = phy_init(pcie->phy);
 	if (ret)
 		goto phy_err;
@@ -395,6 +393,7 @@ static int intel_pcie_probe(struct platform_device *pdev)
 	struct device *dev = &pdev->dev;
 	struct intel_pcie *pcie;
 	struct dw_pcie_rp *pp;
+	struct resource *res;
 	struct dw_pcie *pci;
 	int ret;
 
@@ -419,6 +418,32 @@ static int intel_pcie_probe(struct platform_device *pdev)
 	pci->ops = &intel_pcie_ops;
 	pp->ops = &intel_pcie_dw_ops;
 
+	/*
+	 * If the 'atu' region is not available in the devicetree, use the
+	 * default offset from DBI region for backwards compatibility. The
+	 * 'atu' region should always be specified in the devicetree, as
+	 * this is a hardware-specific address that should not be defined
+	 * in the driver.
+	 */
+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "atu");
+	if (!res) {
+		res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dbi");
+		pci->dbi_base = devm_pci_remap_cfg_resource(pci->dev, res);
+		if (IS_ERR(pci->dbi_base))
+			return PTR_ERR(pci->dbi_base);
+
+		pci->dbi_phys_addr = res->start;
+		pci->atu_base = devm_ioremap(dev, res->start + 0xC0000, SZ_4K);
+		if (!pci->atu_base) {
+			dev_err(dev, "failed to remap ATU space\n");
+			return -ENOMEM;
+		}
+
+		pci->atu_size = SZ_4K;
+		pci->atu_phys_addr = res->start + 0xC0000;
+		dev_warn(dev, "ATU region not specified in DT. Using default offset\n");
+	}
+
 	ret = dw_pcie_host_init(pp);
 	if (ret) {
 		dev_err(dev, "Cannot initialize host\n");