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Microchip clock fixes for v7.1

Browse Source 
This update includes:
 - fix the GMAC GCLK clock ID for the SAM9X7 SoC
 - properly decrement the reference count of a struct device_node
   in pmc_register_ops() after it is no longer needed
 - fix the MPFS peripheral driver registration failures by using the proper
   size and mapping for the output clocks array
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Merge tag 'clk-microchip-fixes-7.1' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into clk-microchip

Pull Microchip clock fixes from Claudiu Beznea:

 - Fix the GMAC GCLK clock ID for the SAM9X7 SoC
 - Properly decrement the reference count of a struct device_node
   in pmc_register_ops() after it is no longer needed
 - Fix the MPFS peripheral driver registration failures by using the proper
   size and mapping for the output clocks array

[sboyd@kernel.org: These all look non-critical so not taking for
clk-fixes]

* tag 'clk-microchip-fixes-7.1' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  clk: at91: keep securam node alive while mapping it
  clk: microchip: mpfs-ccc: fix peripheral driver registration failures after oob fix
  clk: at91: sam9x7: Fix gmac_gclk clock definition
This commit is contained in:
Stephen Boyd 2026-06-13 14:10:42 -07:00
commit 19ec63c4ef
3 changed files with 14 additions and 21 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/clk/at91/pmc.c
View File

@ -180,9 +180,9 @@ static int __init pmc_register_ops(void)
of_node_put(np);
return -ENODEV;
}
of_node_put(np);
at91_pmc_backup_suspend = of_iomap(np, 0);
of_node_put(np);
if (!at91_pmc_backup_suspend) {
pr_warn("%s(): unable to map securam\n", __func__);
return -ENOMEM;

18
drivers/clk/at91/sam9x7.c
View File

@ -568,6 +568,15 @@ static const struct {
.pp_chg_id = INT_MIN,
},
{
.n = "gmac_gclk",
.id = 24,
.pp = { "audiopll_divpmcck", "plla_div2pmcck", },
.pp_mux_table = { 6, 8, },
.pp_count = 2,
.pp_chg_id = INT_MIN,
},
{
.n = "lcd_gclk",
.id = 25,
@ -701,15 +710,6 @@ static const struct {
.pp_count = 1,
.pp_chg_id = INT_MIN,
},
{
.n = "gmac_gclk",
.id = 67,
.pp = { "audiopll_divpmcck", "plla_div2pmcck", },
.pp_mux_table = { 6, 8, },
.pp_count = 2,
.pp_chg_id = INT_MIN,
},
};
static void __init sam9x7_pmc_setup(struct device_node *np)

15
drivers/clk/microchip/clk-mpfs-ccc.c
View File

@ -32,6 +32,7 @@
#define MPFS_CCC_FIXED_DIV 4
#define MPFS_CCC_OUTPUTS_PER_PLL 4
#define MPFS_CCC_REFS_PER_PLL 2
#define MPFS_CCC_NUM_CLKS 16
struct mpfs_ccc_data {
void __iomem **pll_base;
@ -178,7 +179,7 @@ static int mpfs_ccc_register_outputs(struct device *dev, struct mpfs_ccc_out_hw_
return dev_err_probe(dev, ret, "failed to register clock id: %d\n",
out_hw->id);
data->hw_data.hws[out_hw->id - 2] = &out_hw->divider.hw;
data->hw_data.hws[out_hw->id] = &out_hw->divider.hw;
}
return 0;
@ -231,17 +232,9 @@ static int mpfs_ccc_probe(struct platform_device *pdev)
{
struct mpfs_ccc_data *clk_data;
void __iomem *pll_base[ARRAY_SIZE(mpfs_ccc_pll_clks)];
unsigned int num_clks;
int ret;
/*
* If DLLs get added here, mpfs_ccc_register_outputs() currently packs
* sparse clock IDs in the hws array
*/
num_clks = ARRAY_SIZE(mpfs_ccc_pll_clks) + ARRAY_SIZE(mpfs_ccc_pll0out_clks) +
ARRAY_SIZE(mpfs_ccc_pll1out_clks);
clk_data = devm_kzalloc(&pdev->dev, struct_size(clk_data, hw_data.hws, num_clks),
clk_data = devm_kzalloc(&pdev->dev, struct_size(clk_data, hw_data.hws, MPFS_CCC_NUM_CLKS),
GFP_KERNEL);
if (!clk_data)
return -ENOMEM;
@ -255,7 +248,7 @@ static int mpfs_ccc_probe(struct platform_device *pdev)
return PTR_ERR(pll_base[1]);
clk_data->pll_base = pll_base;
clk_data->hw_data.num = num_clks;
clk_data->hw_data.num = MPFS_CCC_NUM_CLKS;
clk_data->dev = &pdev->dev;
ret = mpfs_ccc_register_plls(clk_data->dev, mpfs_ccc_pll_clks,