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drm/amdgpu: Enable unmapped doorbell handling basic mode on mes 12

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Enable basic mode handling for doorbell ring on unmapped CP queue.
In this mode, MES can start schedule the queue mapping based on HW
interrupt instead of timer.

Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Reviewed-by: Harish Kasiviswanthan <Harish.Kasiviswanthan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
shaoyunl 2023-11-22 14:34:11 -05:00 committed by Alex Deucher
parent a2211e475c
commit 19e69a5d28
2 changed files with 17 additions and 2 deletions
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16
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
View File

@ -394,7 +394,14 @@ static int mes_v12_0_set_hw_resources(struct amdgpu_mes *mes)
mes_set_hw_res_pkt.disable_mes_log = 1;
mes_set_hw_res_pkt.use_different_vmid_compute = 1;
mes_set_hw_res_pkt.enable_reg_active_poll = 1;
mes_set_hw_res_pkt.oversubscription_timer = 50;
/*
* No need to enable oversubscribe timer when we have unmapped doorbell
* handling support.
* handling mode - 0: disabled; 1: basic version; 2: basic+ version
*/
mes_set_hw_res_pkt.oversubscription_timer = 0;
mes_set_hw_res_pkt.unmapped_doorbell_handling = 1;
return mes_v12_0_submit_pkt_and_poll_completion(mes,
&mes_set_hw_res_pkt, sizeof(mes_set_hw_res_pkt),
@ -831,6 +838,13 @@ static int mes_v12_0_mqd_init(struct amdgpu_ring *ring)
mqd->cp_hqd_iq_timer = regCP_HQD_IQ_TIMER_DEFAULT;
mqd->cp_hqd_quantum = regCP_HQD_QUANTUM_DEFAULT;
/*
* Set CP_HQD_GFX_CONTROL.DB_UPDATED_MSG_EN[15] to enable unmapped
* doorbell handling. This is a reserved CP internal register can
* not be accesss by others
*/
mqd->reserved_184 = BIT(15);
return 0;
}

3
drivers/gpu/drm/amd/include/mes_v12_api_def.h
View File

@ -238,7 +238,8 @@ union MESAPI_SET_HW_RESOURCES {
uint32_t send_write_data : 1;
uint32_t os_tdr_timeout_override : 1;
uint32_t use_rs64mem_for_proc_gang_ctx : 1;
uint32_t reserved : 17;
uint32_t unmapped_doorbell_handling: 2;
uint32_t reserved : 15;
};
uint32_t uint32_all;
};