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drm/vc4: Use devm_request_irq() for automatic cleanup

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Switch from request_irq()/free_irq() to the device-managed alternative
devm_request_irq(), letting device-managed resource cleanup handle IRQ
teardown automatically.

While here, inline vc4_irq_prepare() into vc4_irq_install() since it's
the only caller.

Reviewed-by: Melissa Wen <mwen@igalia.com>
Link: https://patch.msgid.link/20260330-vc4-misc-fixes-v1-5-92defc940a29@igalia.com
Signed-off-by: Maíra Canal <mcanal@igalia.com>
This commit is contained in:
Maíra Canal 2026-03-30 14:51:47 -03:00
parent f649e63d4a
commit 19e2815bab
No known key found for this signature in database
GPG Key ID: 3FF30E8A7688FAAA
1 changed files with 12 additions and 21 deletions
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33
drivers/gpu/drm/vc4/vc4_irq.c
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@ -47,7 +47,6 @@
#include <linux/platform_device.h>
#include <drm/drm_drv.h>
#include <drm/drm_print.h>
#include "vc4_drv.h"
@ -242,23 +241,6 @@ vc4_irq(int irq, void *arg)
return status;
}
static void
vc4_irq_prepare(struct drm_device *dev)
{
struct vc4_dev *vc4 = to_vc4_dev(dev);
if (!vc4->v3d)
return;
init_waitqueue_head(&vc4->job_wait_queue);
INIT_WORK(&vc4->overflow_mem_work, vc4_overflow_mem_work);
/* Clear any pending interrupts someone might have left around
* for us.
*/
V3D_WRITE(V3D_INTCTL, V3D_DRIVER_IRQS);
}
void
vc4_irq_enable(struct drm_device *dev)
{
@ -307,12 +289,22 @@ int vc4_irq_install(struct drm_device *dev, int irq)
if (WARN_ON_ONCE(vc4->gen > VC4_GEN_4))
return -ENODEV;
if (!vc4->v3d)
return -ENODEV;
if (irq == IRQ_NOTCONNECTED)
return -ENOTCONN;
vc4_irq_prepare(dev);
init_waitqueue_head(&vc4->job_wait_queue);
INIT_WORK(&vc4->overflow_mem_work, vc4_overflow_mem_work);
ret = request_irq(irq, vc4_irq, 0, dev->driver->name, dev);
/* Clear any pending interrupts someone might have left around
* for us.
*/
V3D_WRITE(V3D_INTCTL, V3D_DRIVER_IRQS);
ret = devm_request_irq(dev->dev, irq, vc4_irq, 0,
dev_name(dev->dev), dev);
if (ret)
return ret;
@ -329,7 +321,6 @@ void vc4_irq_uninstall(struct drm_device *dev)
return;
vc4_irq_disable(dev);
free_irq(vc4->irq, dev);
}
/** Reinitializes interrupt registers when a GPU reset is performed. */