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i2c: qcom-cci: Fix HALT_ACK reset request being dropped

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A HALT_ACK interrupt indicates that the corresponding I2C master has
entered the halted state and must be reset before further operation.

The M0 and M1 HALT_ACK status bits may be asserted simultaneously in a
single interrupt. However, the interrupt handler currently overwrites
the reset mask when processing each HALT_ACK condition, causing the
first reset request to be lost if both events are reported together.

Accumulate reset requests instead of overwriting them so that both
masters are properly reset when M0 and M1 HALT_ACK events occur in the
same interrupt.

Fixes: e517526195 ("i2c: Add Qualcomm CCI I2C driver")
Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com>
Cc: <stable@vger.kernel.org> # v5.8+
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
Link: https://patch.msgid.link/20261012-cci-fixes-v1-1-8cd4eb1fc5f9@oss.qualcomm.com
This commit is contained in:
Loic Poulain 2026-10-12 14:54:56 +02:00 committed by Andi Shyti
parent 8cb5c17be3
commit 195f3d74b5
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GPG Key ID: DA78056626D32D6E
1 changed files with 2 additions and 2 deletions
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4
drivers/i2c/busses/i2c-qcom-cci.c
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@ -164,12 +164,12 @@ static irqreturn_t cci_isr(int irq, void *dev)
}
if (unlikely(val & CCI_IRQ_STATUS_0_I2C_M0_Q0Q1_HALT_ACK)) {
reset = CCI_RESET_CMD_M0_MASK;
reset |= CCI_RESET_CMD_M0_MASK;
ret = IRQ_HANDLED;
}
if (unlikely(val & CCI_IRQ_STATUS_0_I2C_M1_Q0Q1_HALT_ACK)) {
reset = CCI_RESET_CMD_M1_MASK;
reset |= CCI_RESET_CMD_M1_MASK;
ret = IRQ_HANDLED;
}