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dt-bindings: iio: adc: ad7380: add adaq4370-4 and adaq4380-4 compatible parts
adaq4370-4 (2MSPS) and adaq4380-4 (4MSPS) are quad-channel precision data acquisition signal chain μModule solutions compatible with the ad738x family, with the following differences: - pin selectable gain in front of each 4 adc - internal reference is 3V derived from refin-supply (5V) - additional supplies To select the gain a new patternProperties is added to describe each channel. It is restricted to adaq devices. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Julien Stephan <jstephan@baylibre.com> Reviewed-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20241030-ad7380-add-adaq4380-4-support-v4-1-864ff02babae@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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@ -25,6 +25,8 @@ description: |
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* https://www.analog.com/en/products/ad7386-4.html
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* https://www.analog.com/en/products/ad7387-4.html
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* https://www.analog.com/en/products/ad7388-4.html
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* https://www.analog.com/en/products/adaq4370-4.html
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* https://www.analog.com/en/products/adaq4380-4.html
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$ref: /schemas/spi/spi-peripheral-props.yaml#
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@ -46,6 +48,8 @@ properties:
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- adi,ad7386-4
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- adi,ad7387-4
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- adi,ad7388-4
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- adi,adaq4370-4
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- adi,adaq4380-4
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reg:
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maxItems: 1
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@ -70,6 +74,20 @@ properties:
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refin-supply:
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description:
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A 2.5V to 3.3V supply for external reference voltage, for ad7380-4 only.
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For adaq devices, a 5V supply voltage. A 3.3V internal reference is
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derived from it. Connect to vs-p-supply for normal operation.
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vs-p-supply:
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description:
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Amplifiers positive supply.
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vs-n-supply:
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description:
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Amplifiers negative supply.
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ldo-supply:
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description:
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LDO supply. Connect to vs-p-supply or a 3.6 to 5.5 V supply.
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aina-supply:
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description:
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@ -97,12 +115,45 @@ properties:
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specify the ALERT interrupt.
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maxItems: 1
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"#address-cells":
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const: 1
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"#size-cells":
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const: 0
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required:
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- compatible
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- reg
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- vcc-supply
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- vlogic-supply
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patternProperties:
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"^channel@[0-3]$":
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$ref: adc.yaml
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type: object
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properties:
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reg:
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description:
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The channel number. From 0 to 3 corresponding to channels A,B,C,D
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minimum: 0
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maximum: 3
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adi,gain-milli:
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description:
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The hardware gain applied to the ADC input (in milli units).
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If not present, default to 1000 (no actual gain applied).
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Refer to the typical connection diagrams section of the datasheet for
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pin wiring.
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$ref: /schemas/types.yaml#/definitions/uint16
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enum: [300, 600, 1000, 1600]
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default: 1000
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required:
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- reg
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additionalProperties: false
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unevaluatedProperties: false
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allOf:
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@ -140,6 +191,7 @@ allOf:
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aind-supply: false
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# ad7380-4 uses refin-supply as external reference.
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# adaq devices use internal reference only, derived from refin-supply
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# All other chips from ad738x family use refio as optional external reference.
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# When refio-supply is omitted, internal reference is used.
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- if:
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@ -147,6 +199,8 @@ allOf:
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compatible:
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enum:
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- adi,ad7380-4
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- adi,adaq4370-4
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- adi,adaq4380-4
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then:
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properties:
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refio-supply: false
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@ -156,6 +210,27 @@ allOf:
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properties:
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refin-supply: false
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# adaq devices need more supplies and using channel to declare gain property
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# only applies to adaq devices
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- if:
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properties:
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compatible:
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enum:
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- adi,adaq4370-4
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- adi,adaq4380-4
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then:
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required:
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- vs-p-supply
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- vs-n-supply
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- ldo-supply
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else:
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properties:
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vs-p-supply: false
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vs-n-supply: false
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ldo-supply: false
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patternProperties:
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"^channel@[0-3]$": false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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@ -180,3 +255,48 @@ examples:
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refio-supply = <&supply_2_5V>;
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};
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};
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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spi {
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#address-cells = <1>;
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#size-cells = <0>;
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adc@0 {
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compatible = "adi,adaq4380-4";
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reg = <0>;
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spi-cpol;
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spi-cpha;
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spi-max-frequency = <80000000>;
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interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
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interrupt-parent = <&gpio0>;
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vcc-supply = <&supply_3_3V>;
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vlogic-supply = <&supply_3_3V>;
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refin-supply = <&supply_5V>;
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vs-p-supply = <&supply_5V>;
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vs-n-supply = <&supply_0V>;
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ldo-supply = <&supply_5V>;
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#address-cells = <1>;
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#size-cells = <0>;
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channel@0 {
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reg = <0>;
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adi,gain-milli = /bits/ 16 <300>;
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};
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channel@2 {
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reg = <2>;
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adi,gain-milli = /bits/ 16 <600>;
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};
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channel@3 {
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reg = <3>;
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adi,gain-milli = /bits/ 16 <1000>;
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};
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};
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};
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