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gpiolib: acpi: Add ignore_wake quirk for ASUS ZenBook UX425UA_UM425UA

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The ASUS ZenBook UX425UA_UM425UA (with AMD Ryzen 7 5700U SoC) fails
to stay suspended in s2idle (Modern Standby), prematurely waking
after 1-3 seconds with 0% hardware sleep achieved.

In the laptop's ACPI SSDT tables (SSDT15), GPIO Pin 24 (hex 0x18) is
defined in _AEI as ExclusiveAndWake targeting the PCIe bridge device
\_SB.PCI0.GPP3:

    GpioInt (Edge, ActiveLow, ExclusiveAndWake, PullNone, 0x0000,
             "\\_SB.GPIO", ...) { 0x0018 }

When the SoC powers down PCIe root ports into low-power states during
s2idle, an electrical edge transition triggers a spurious wake interrupt
on GPIO Pin 24. This signals the AMD GPIO controller (AMDI0030:00 / IRQ 7
via pinctrl_amd), aborting sleep across the system.

Booting with kernel parameter "gpiolib_acpi.ignore_wake=AMDI0030:00@24"
completely resolves the issue: amd_gpio reports ignoring the wakeup on
pin 24, and interrupt counts in /proc/interrupts remain at 0 during sleep
cycles, allowing uninterrupted s2idle until intentionally woken by the
user.

Add a DMI quirk entry to ignore wake events on AMDI0030:00@24 for this
system.

Signed-off-by: Kivan <vaknins33@gmail.com>
Reviewed-by: Mario Limonciello (AMD) <superm1@kernel.org>
Link: https://patch.msgid.link/20260821070651.39763-1-vaknins33@gmail.com
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
This commit is contained in:
Kivan 2026-08-21 10:06:50 +03:00 committed by Bartosz Golaszewski
parent 785ec26c37
commit 1900b5a414
1 changed files with 13 additions and 0 deletions
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13
drivers/gpio/gpiolib-acpi-quirks.c
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@ -392,6 +392,19 @@ static const struct dmi_system_id gpiolib_acpi_quirks[] __initconst = {
.ignore_wake = "VEN_0488:00@355",
},
},
{
/*
* Spurious wakeups from GPP3 PCIe bridge interrupt
* Found in BIOS UX425UA.301
*/
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
DMI_MATCH(DMI_PRODUCT_NAME, "ZenBook UX425UA_UM425UA"),
},
.driver_data = &(struct acpi_gpiolib_dmi_quirk) {
.ignore_wake = "AMDI0030:00@24",
},
},
{} /* Terminating entry */
};