arm64: dts: qcom: qcs615: add ADSP and CDSP nodes

Add nodes for remoteprocs: ADSP and CDSP for QCS615 SoC to enable proper
remoteproc functionality.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com>
Link: https://lore.kernel.org/r/20250526-add_qcs615_remoteproc_support-v4-5-06a7d8bed0b5@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Lijuan Gao 2025-05-26 13:21:51 +08:00 committed by Bjorn Andersson
parent a129ca1a94
commit 18b011d456

View File

@ -473,6 +473,16 @@ smem_region: smem@86000000 {
no-map;
hwlocks = <&tcsr_mutex 3>;
};
rproc_cdsp_mem: rproc-cdsp@93b00000 {
reg = <0x0 0x93b00000 0x0 0x1e00000>;
no-map;
};
rproc_adsp_mem: rproc-adsp@95900000 {
reg = <0x0 0x95900000 0x0 0x1e00000>;
no-map;
};
};
soc: soc@0 {
@ -3118,6 +3128,44 @@ cti@7900000 {
clock-names = "apb_pclk";
};
remoteproc_cdsp: remoteproc@8300000 {
compatible = "qcom,qcs615-cdsp-pas", "qcom,sm8150-cdsp-pas";
reg = <0x0 0x08300000 0x0 0x4040>;
interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>,
<&cdsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
<&cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
<&cdsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
<&cdsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "wdog",
"fatal",
"ready",
"handover",
"stop-ack";
clocks = <&rpmhcc RPMH_CXO_CLK>;
clock-names = "xo";
power-domains = <&rpmhpd RPMHPD_CX>;
power-domain-names = "cx";
memory-region = <&rproc_cdsp_mem>;
qcom,qmp = <&aoss_qmp>;
qcom,smem-states = <&cdsp_smp2p_out 0>;
qcom,smem-state-names = "stop";
status = "disabled";
glink-edge {
interrupts = <GIC_SPI 574 IRQ_TYPE_EDGE_RISING>;
mboxes = <&apss_shared 4>;
label = "cdsp";
qcom,remote-pid = <5>;
};
};
pmu@90b6300 {
compatible = "qcom,qcs615-cpu-bwmon", "qcom,sdm845-bwmon";
reg = <0x0 0x090b6300 0x0 0x600>;
@ -3751,6 +3799,44 @@ usb_2_dwc3: usb@a800000 {
maximum-speed = "high-speed";
};
};
remoteproc_adsp: remoteproc@62400000 {
compatible = "qcom,qcs615-adsp-pas", "qcom,sm8150-adsp-pas";
reg = <0x0 0x62400000 0x0 0x4040>;
interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>,
<&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
<&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
<&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
<&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "wdog",
"fatal",
"ready",
"handover",
"stop-ack";
clocks = <&rpmhcc RPMH_CXO_CLK>;
clock-names = "xo";
power-domains = <&rpmhpd RPMHPD_CX>;
power-domain-names = "cx";
memory-region = <&rproc_adsp_mem>;
qcom,qmp = <&aoss_qmp>;
qcom,smem-states = <&adsp_smp2p_out 0>;
qcom,smem-state-names = "stop";
status = "disabled";
glink_edge: glink-edge {
interrupts = <GIC_SPI 170 IRQ_TYPE_EDGE_RISING>;
mboxes = <&apss_shared 24>;
label = "lpass";
qcom,remote-pid = <2>;
};
};
};
arch_timer: timer {