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riscv: dts: anlogic: dr1v90: Add "b" ISA extension

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"b" is ratified (Apr/2024) much later than its components zba/zbb/zbs
(Jun/2021). With "b" added into riscv/extensions.yaml, a dependency
checking rule is now enforced, which requires that when zba, zbb, and zbs
are all specified, "b" must be added as well. Failing to do this will
cause dtbs_check schema check warnings.

According to uabi.rst, as a single-letter extension, "b" should be added
after "c" in canonical order.

Update dr1v90.dtsi to conform to this rule. Line balancing is performed
to improve readability.

Signed-off-by: Guodong Xu <guodong@riscstar.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
This commit is contained in:
Guodong Xu 2026-01-15 07:18:58 +08:00 committed by Conor Dooley
parent a36b2aaae7
commit 18649ffbb6
1 changed files with 3 additions and 2 deletions
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arch/riscv/boot/dts/anlogic/dr1v90.dtsi
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@ -27,8 +27,9 @@ cpu@0 {
mmu-type = "riscv,sv39";
reg = <0>;
riscv,isa-base = "rv64i";
riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zba", "zbb", "zbc",
"zbkc", "zbs", "zicntr", "zicsr", "zifencei",
riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "b",
"zba", "zbb", "zbc", "zbkc", "zbs",
"zicntr", "zicsr", "zifencei",
"zihintpause", "zihpm";
cpu0_intc: interrupt-controller {