irqchip/gic-v5: Fix gicv5_init_common() error paths

Current code fails to disable interrupts on gicv5_starting_cpu() failure
and to set the handle_arch_irq pointer to NULL if gicv5_irs_enable() fails.

Update the respective error paths to fix them.

Fixes: 7ec80fb3f0 ("irqchip/gic-v5: Add GICv5 PPI support")
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@kernel.org>
Link: https://patch.msgid.link/20260812-gicv5-7-2-fixes-v1-4-3743e82c69a4@kernel.org
This commit is contained in:
Lorenzo Pieralisi 2026-08-12 11:10:32 +02:00 committed by Thomas Gleixner
parent 79b115c2a2
commit 183750b276

View File

@ -1174,7 +1174,7 @@ static int __init gicv5_init_common(struct fwnode_handle *parent_domain)
ret = gicv5_starting_cpu(smp_processor_id());
if (ret)
goto out_dom;
goto out_int;
ret = set_handle_irq(gicv5_handle_irq);
if (ret)
@ -1182,16 +1182,17 @@ static int __init gicv5_init_common(struct fwnode_handle *parent_domain)
ret = gicv5_irs_enable();
if (ret)
goto out_int;
goto out_handle;
gicv5_smp_init();
gicv5_irs_its_probe();
return 0;
out_handle:
set_handle_irq(NULL);
out_int:
gicv5_cpu_disable_interrupts();
out_dom:
gicv5_free_domains();
return ret;
}